Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753280AbdHPCv0 (ORCPT ); Tue, 15 Aug 2017 22:51:26 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:34809 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752813AbdHPCvY (ORCPT ); Tue, 15 Aug 2017 22:51:24 -0400 From: Kever Yang To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, Kever Yang , Douglas Anderson , William wu , Elaine Zhang , Brian Norris , linux-kernel@vger.kernel.org, Shawn Lin , devicetree@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org, Jacob Chen , Will Deacon , Mark Rutland , Caesar Wang , Catalin Marinas , Roger Chen Subject: [PATCH] arm64: dts: rk3399: init vop clock rates Date: Wed, 16 Aug 2017 10:51:09 +0800 Message-Id: <1502851869-1736-1-git-send-email-kever.yang@rock-chips.com> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1344 Lines: 33 We need to init vop aclk and hclk incase the U-Boot does not do the initialize. Signed-off-by: Kever Yang --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 0b3acc9..a592c24 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1480,6 +1480,8 @@ interrupts = ; clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; + assigned-clock-rates = <400000000>, <100000000>; iommus = <&vopl_mmu>; power-domains = <&power RK3399_PD_VOPL>; resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>; @@ -1525,6 +1527,8 @@ interrupts = ; clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; + assigned-clock-rates = <400000000>, <100000000>; iommus = <&vopb_mmu>; power-domains = <&power RK3399_PD_VOPB>; resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>; -- 1.9.1