Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751756AbdHPFxk (ORCPT ); Wed, 16 Aug 2017 01:53:40 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:32998 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751129AbdHPFxi (ORCPT ); Wed, 16 Aug 2017 01:53:38 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org BBF1660300 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=architt@codeaurora.org Subject: Re: [PATCH v4 14/20] mtd: nand: qcom: add command elements in BAM transaction To: Abhishek Sahu , boris.brezillon@free-electrons.com Cc: dwmw2@infradead.org, computersforpeace@gmail.com, marek.vasut@gmail.com, richard@nod.at, cyrille.pitchen@wedev4u.fr, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, andy.gross@linaro.org, sricharan@codeaurora.org References: <1502451575-15712-1-git-send-email-absahu@codeaurora.org> <1502451575-15712-15-git-send-email-absahu@codeaurora.org> From: Archit Taneja Message-ID: Date: Wed, 16 Aug 2017 11:23:32 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <1502451575-15712-15-git-send-email-absahu@codeaurora.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3418 Lines: 98 On 08/11/2017 05:09 PM, Abhishek Sahu wrote: > All the QPIC register read/write through BAM DMA requires > command descriptor which contains the array of command elements. Reviewed-by: Archit Taneja Thanks, Archit > > Signed-off-by: Abhishek Sahu > --- > drivers/mtd/nand/qcom_nandc.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c > index c0c140b..d17c466 100644 > --- a/drivers/mtd/nand/qcom_nandc.c > +++ b/drivers/mtd/nand/qcom_nandc.c > @@ -22,6 +22,7 @@ > #include > #include > #include > +#include > > /* NANDc reg offsets */ > #define NAND_FLASH_CMD 0x00 > @@ -196,6 +197,7 @@ > /* Returns the actual register address for NAND_FLASH_DEV_* */ > #define nandc_dev_addr(nandc, reg) ((nandc)->props->flash_dev_offset + (reg)) > > +#define QPIC_PER_CW_CMD_ELEMENTS 32 > #define QPIC_PER_CW_CMD_SGL 32 > #define QPIC_PER_CW_DATA_SGL 8 > > @@ -215,8 +217,13 @@ > /* > * This data type corresponds to the BAM transaction which will be used for all > * NAND transfers. > + * @bam_ce - the array of BAM command elements > * @cmd_sgl - sgl for NAND BAM command pipe > * @data_sgl - sgl for NAND BAM consumer/producer pipe > + * @bam_ce_pos - the index in bam_ce which is available for next sgl > + * @bam_ce_start - the index in bam_ce which marks the start position ce > + * for current sgl. It will be used for size calculation > + * for current sgl > * @cmd_sgl_pos - current index in command sgl. > * @cmd_sgl_start - start index in command sgl. > * @tx_sgl_pos - current index in data sgl for tx. > @@ -225,8 +232,11 @@ > * @rx_sgl_start - start index in data sgl for rx. > */ > struct bam_transaction { > + struct bam_cmd_element *bam_ce; > struct scatterlist *cmd_sgl; > struct scatterlist *data_sgl; > + u32 bam_ce_pos; > + u32 bam_ce_start; > u32 cmd_sgl_pos; > u32 cmd_sgl_start; > u32 tx_sgl_pos; > @@ -456,7 +466,8 @@ static void free_bam_transaction(struct qcom_nand_controller *nandc) > > bam_txn_size = > sizeof(*bam_txn) + num_cw * > - ((sizeof(*bam_txn->cmd_sgl) * QPIC_PER_CW_CMD_SGL) + > + ((sizeof(*bam_txn->bam_ce) * QPIC_PER_CW_CMD_ELEMENTS) + > + (sizeof(*bam_txn->cmd_sgl) * QPIC_PER_CW_CMD_SGL) + > (sizeof(*bam_txn->data_sgl) * QPIC_PER_CW_DATA_SGL)); > > bam_txn_buf = devm_kzalloc(nandc->dev, bam_txn_size, GFP_KERNEL); > @@ -466,6 +477,10 @@ static void free_bam_transaction(struct qcom_nand_controller *nandc) > bam_txn = bam_txn_buf; > bam_txn_buf += sizeof(*bam_txn); > > + bam_txn->bam_ce = bam_txn_buf; > + bam_txn_buf += > + sizeof(*bam_txn->bam_ce) * QPIC_PER_CW_CMD_ELEMENTS * num_cw; > + > bam_txn->cmd_sgl = bam_txn_buf; > bam_txn_buf += > sizeof(*bam_txn->cmd_sgl) * QPIC_PER_CW_CMD_SGL * num_cw; > @@ -483,6 +498,8 @@ static void clear_bam_transaction(struct qcom_nand_controller *nandc) > if (!nandc->props->is_bam) > return; > > + bam_txn->bam_ce_pos = 0; > + bam_txn->bam_ce_start = 0; > bam_txn->cmd_sgl_pos = 0; > bam_txn->cmd_sgl_start = 0; > bam_txn->tx_sgl_pos = 0; > -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project