Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751649AbdHPIfj (ORCPT ); Wed, 16 Aug 2017 04:35:39 -0400 Received: from lucky1.263xmail.com ([211.157.147.131]:40844 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751224AbdHPIfg (ORCPT ); Wed, 16 Aug 2017 04:35:36 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: linux-arm-kernel@lists.infradead.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: <55503ec7f2d47e57dc7e1784e85bdebd> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Cc: linux-kernel@vger.kernel.org, bhelgaas@google.com, shawn.lin@rock-chips.com, briannorris@chromium.org, dianders@chromium.org, devicetree@vger.kernel.org, Heiko Stuebner , linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: Re: [RFC PATCH 2/3] dt-bindings: PCI: rockchip: Add support for pcie wake irq To: Jeffy Chen References: <20170816075224.31734-1-jeffy.chen@rock-chips.com> <20170816075224.31734-3-jeffy.chen@rock-chips.com> From: Shawn Lin Message-ID: <35487e90-74f2-3a66-70d3-d0780b0b6e26@rock-chips.com> Date: Wed, 16 Aug 2017 16:35:24 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <20170816075224.31734-3-jeffy.chen@rock-chips.com> Content-Type: text/plain; charset=gbk; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1292 Lines: 38 Hi Jeffy On 2017/8/16 15:52, Jeffy Chen wrote: > Add an optional interrupt for PCIE_WAKE pin. > > Signed-off-by: Jeffy Chen > --- > > Documentation/devicetree/bindings/pci/rockchip-pcie.txt | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/rockchip-pcie.txt b/Documentation/devicetree/bindings/pci/rockchip-pcie.txt > index 1453a734c2f5..6ef9903567db 100644 > --- a/Documentation/devicetree/bindings/pci/rockchip-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/rockchip-pcie.txt > @@ -22,10 +22,13 @@ Required properties: > - phys: From PHY bindings: Phandle for the Generic PHY for PCIe. > - phy-names: MUST be "pcie-phy". > - interrupts: Three interrupt entries must be specified. > -- interrupt-names: Must include the following names > - - "sys" > - - "legacy" > - - "client" > +- interrupt-names: Include the following names > + Required: > + - "sys" > + - "legacy" > + - "client" > + Optional: > + - "wake" It would be better to introduce interrupts-extended and show a example here. :) > - resets: Must contain seven entries for each entry in reset-names. > See ../reset/reset.txt for details. > - reset-names: Must include the following names >