Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751636AbdHRMPR (ORCPT ); Fri, 18 Aug 2017 08:15:17 -0400 Received: from mail-by2nam01on0087.outbound.protection.outlook.com ([104.47.34.87]:26395 "EHLO NAM01-BY2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750949AbdHRMPN (ORCPT ); Fri, 18 Aug 2017 08:15:13 -0400 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; arndb.de; dkim=none (message not signed) header.d=none;arndb.de; dmarc=bestguesspass action=none header.from=xilinx.com; Subject: Re: [PATCH 3/3] soc: xilinx: zynqmp: Add firmware interface To: Arnd Bergmann , Michal Simek CC: Linux ARM , =?UTF-8?Q?S=c3=b6ren_Brinkmann?= , Lucas Stach , Michal Simek , yangbo lu , =?UTF-8?Q?Andreas_F=c3=a4rber?= , Linux Kernel Mailing List , Alexandre Belloni , Baoyou Xie , Shawn Guo , Geert Uytterhoeven , Nicolas Ferre , Simon Horman References: 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18 Aug 2017 12:15:11.2202 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR02MB2247 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1655 Lines: 48 On 17.8.2017 23:11, Arnd Bergmann wrote: > On Thu, Aug 17, 2017 at 12:48 PM, Michal Simek wrote: >> On 16.8.2017 17:05, Arnd Bergmann wrote: >>> On Wed, Aug 16, 2017 at 4:34 PM, Michal Simek wrote: >>> >>> Looks good, just make sure you also check with sparse (make C=1) >>> to ensure you have the right __le64/__le32 types everywhere. >> >> Are you aware about any doc where it is written that data should be >> passed as little endian? > > Looking at http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf > now, I think that the structure above is endian-neutral as the arguments > get passed in registers rather than memory. > > However, if you pass pointers to data structures in memory, those > data structures would have to be defined with __le32/__le64 types. ok. > >> I was playing with it a little bit and this means that these 2(3 with >> hvc) needs to be changed. >> >> asmlinkage void __arm_smccc_smc(__le64 a0, __le64 a1, __le64 a2, >> __le64 a3,__le64 a4, __le64 a5, __le64 a6, __le64 a7, >> struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); >> >> struct arm_smccc_res { >> - unsigned long a0; >> - unsigned long a1; >> - unsigned long a2; >> - unsigned long a3; >> + __le64 a0; >> + __le64 a1; >> + __le64 a2; >> + __le64 a3; >> }; > > This is clearly wrong on 32-bit machines, I think this is intentionally > defined as 'unsigned long' to have register sized arguments. Yep, I know. Let me integrate that changes which Marc wanted and will send next version. Thanks, Michal