Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753419AbdHROW4 (ORCPT ); Fri, 18 Aug 2017 10:22:56 -0400 Received: from mail-wr0-f176.google.com ([209.85.128.176]:34153 "EHLO mail-wr0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753329AbdHROWx (ORCPT ); Fri, 18 Aug 2017 10:22:53 -0400 From: Georgi Djakov To: sboyd@codeaurora.org Cc: mturquette@baylibre.com, robdclark@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, georgi.djakov@linaro.org Subject: [PATCH] clk: qcom: msm8916: Fix bimc gpu clock ops Date: Fri, 18 Aug 2017 17:22:50 +0300 Message-Id: <20170818142250.27867-1-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.13.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 920 Lines: 27 The clock bimc_gpu_clk_src is incorrectly set to use the shared rcg2 ops, which are for RCGs with child branches controlled by different CPUs. The result of the incorrect ops is that the GPU's PM runtime may leave this clock set at a very low rate. Fix this issue by using the correct rcg2 ops. Fixes: a2e8272f3f89 ("clk: qcom: Add MSM8916 gpu clocks") Signed-off-by: Georgi Djakov --- drivers/clk/qcom/gcc-msm8916.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c index 2cfe7000fc60..3410ee68d4bc 100644 --- a/drivers/clk/qcom/gcc-msm8916.c +++ b/drivers/clk/qcom/gcc-msm8916.c @@ -1176,7 +1176,7 @@ static struct clk_rcg2 bimc_gpu_clk_src = { .parent_names = gcc_xo_gpll0_bimc, .num_parents = 3, .flags = CLK_GET_RATE_NOCACHE, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, };