Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751561AbdHSOuE (ORCPT ); Sat, 19 Aug 2017 10:50:04 -0400 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:34594 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751102AbdHSOuD (ORCPT ); Sat, 19 Aug 2017 10:50:03 -0400 MIME-Version: 1.0 In-Reply-To: <20170819124839.4034-4-codekipper@gmail.com> References: <20170819124839.4034-1-codekipper@gmail.com> <20170819124839.4034-4-codekipper@gmail.com> From: Chen-Yu Tsai Date: Sat, 19 Aug 2017 22:49:38 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [linux-sunxi] [PATCH v5 3/8] ASoC: sun4i-i2s: bclk and lrclk polarity tidyup To: Code Kipper Cc: Maxime Ripard , linux-arm-kernel , linux-sunxi , Liam Girdwood , Mark Brown , linux-kernel , Linux-ALSA , "Andrea Venturi (pers)" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 363 Lines: 10 On Sat, Aug 19, 2017 at 8:48 PM, wrote: > From: Marcus Cooper > > On newer SoCs the bit fields for the blck and lrclk polarity are in > a different locations. Use regmap fields to set the polarity bits > as intended. > > Signed-off-by: Marcus Cooper Reviewed-by: Chen-Yu Tsai