Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753202AbdHUI5h (ORCPT ); Mon, 21 Aug 2017 04:57:37 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:38800 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752519AbdHUI5f (ORCPT ); Mon, 21 Aug 2017 04:57:35 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org ABB066072E Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=aneela@codeaurora.org Subject: Re: [PATCH 2/3] soc: qcom: smem: Support dynamic item limit To: Chris Lew , bjorn.andersson@linaro.org, andy.gross@linaro.org, david.brown@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-kernel@vger.kernel.org References: <1503018948-26629-1-git-send-email-clew@codeaurora.org> <1503018948-26629-3-git-send-email-clew@codeaurora.org> From: Arun Kumar Neelakantam Message-ID: Date: Mon, 21 Aug 2017 14:27:29 +0530 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <1503018948-26629-3-git-send-email-clew@codeaurora.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3960 Lines: 111 On 8/18/2017 6:45 AM, Chris Lew wrote: > In V12 SMEM, SBL writes SMEM parameter information > after the TOC. Use the SBL provided item count > as the max item number. > > Signed-off-by: Chris Lew > --- > drivers/soc/qcom/smem.c | 41 +++++++++++++++++++++++++++++++++++++++-- > 1 file changed, 39 insertions(+), 2 deletions(-) > > diff --git a/drivers/soc/qcom/smem.c b/drivers/soc/qcom/smem.c > index fed2934d6bda..a51f4ba42173 100644 > --- a/drivers/soc/qcom/smem.c > +++ b/drivers/soc/qcom/smem.c > @@ -225,6 +225,24 @@ struct smem_private_entry { > #define SMEM_PRIVATE_CANARY 0xa5a5 > > /** > + * struct smem_info - smem region info located after the table of contents > + * @magic: magic number, must be SMEM_INFO_MAGIC > + * @size: size of the smem region > + * @base_addr: base address of the smem region > + * @reserved: for now reserved entry > + * @num_items: highest accepted item number > + */ > +struct smem_info { > + u8 magic[4]; > + __le32 size; > + __le32 base_addr; > + __le32 reserved; > + __le32 num_items; The num_items is first 16bits of reserved field, we dont have 32bit reserved and 32 bit for num_items > +}; > + > +static const u8 SMEM_INFO_MAGIC[] = { 0x53, 0x49, 0x49, 0x49 }; /* SIII */ > + > +/** > * struct smem_region - representation of a chunk of memory used for smem > * @aux_base: identifier of aux_mem base > * @virt_base: virtual base address of memory with this aux_mem identifier > @@ -245,6 +263,7 @@ struct smem_region { > * @partitions: list of pointers to partitions affecting the current > * processor/host > * @cacheline: list of cacheline sizes for each host > + * @item_count: max accepted item number > * @num_regions: number of @regions > * @regions: list of the memory regions defining the shared memory > */ > @@ -257,6 +276,7 @@ struct qcom_smem { > size_t global_cacheline; > struct smem_partition_header *partitions[SMEM_HOST_COUNT]; > size_t cacheline[SMEM_HOST_COUNT]; > + u32 item_count; > > unsigned num_regions; > struct smem_region regions[0]; > @@ -388,7 +408,7 @@ static int qcom_smem_alloc_global(struct qcom_smem *smem, > struct smem_header *header; > struct smem_global_entry *entry; > > - if (WARN_ON(item >= SMEM_ITEM_COUNT)) > + if (WARN_ON(item >= smem->item_count)) can you please add this item_count check from partition alloc/get also if avoid any unknown clients usage of smem > return -EINVAL; > > header = smem->regions[0].virt_base; > @@ -473,7 +493,7 @@ static void *qcom_smem_get_global(struct qcom_smem *smem, > u32 aux_base; > unsigned i; > > - if (WARN_ON(item >= SMEM_ITEM_COUNT)) > + if (WARN_ON(item >= smem->item_count)) > return ERR_PTR(-EINVAL); > > header = smem->regions[0].virt_base; > @@ -640,6 +660,19 @@ static int qcom_smem_get_sbl_version(struct qcom_smem *smem) > return le32_to_cpu(versions[SMEM_MASTER_SBL_VERSION_INDEX]); > } > > +static u32 qcom_smem_get_dynamic_item(struct qcom_smem *smem) > +{ > + struct smem_ptable *ptable; > + struct smem_info *info; > + > + ptable = smem->regions[0].virt_base + smem->regions[0].size - SZ_4K; > + info = (struct smem_info *)&ptable->entry[ptable->num_entries]; > + if (memcmp(info->magic, SMEM_INFO_MAGIC, sizeof(info->magic))) > + return SMEM_ITEM_COUNT; > + > + return le32_to_cpu(info->num_items); > +} > + > static int qcom_smem_set_global_partition(struct qcom_smem *smem, > struct smem_ptable_entry *entry) > { > @@ -857,7 +890,11 @@ static int qcom_smem_probe(struct platform_device *pdev) > version = qcom_smem_get_sbl_version(smem); > switch (version >> 16) { > case SMEM_GLOBAL_PART_VERSION: > + smem->item_count = qcom_smem_get_dynamic_item(smem); > + break; > case SMEM_GLOBAL_HEAP_VERSION: > + smem->item_count = SMEM_ITEM_COUNT; > + break; > default: > dev_err(&pdev->dev, "Unsupported SMEM version 0x%x\n", version); > return -EINVAL;