Date: Mon, 21 Aug 2017 21:39:23 -0500
From: Rob Herring <robh@kernel.org>
To: Mikko Perttunen <mperttunen@nvidia.com>
Cc: thierry.reding@gmail.com, jonathanh@nvidia.com, mark.rutland@arm.com,
        devicetree@vger.kernel.org, dnibade@nvidia.com,
        linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
        amerilainen@nvidia.com, linux-tegra@vger.kernel.org,
        sgurrappadi@nvidia.com, digetx@gmail.com,
        linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 4/6] dt-bindings: host1x: Fix and add Tegra186 information
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On Thu, Aug 17, 2017 at 09:54:11PM +0300, Mikko Perttunen wrote:
> Add note that address/size-cells should be 2 on 64-bit systems,
> and add Tegra186-specific register range properties.

Generally the cell sizes have nothing to do with the addressing size of 
the cpu. They should be as small as what fits for the given sub-tree. If 
all the register space fits into 4GB, then there's no reason for the 
#size-cells to be 2. The same is true if the sub-tree has a parent bus.

Rob