Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751754AbdHVRR0 convert rfc822-to-8bit (ORCPT ); Tue, 22 Aug 2017 13:17:26 -0400 Received: from mga01.intel.com ([192.55.52.88]:11970 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751695AbdHVRRZ (ORCPT ); Tue, 22 Aug 2017 13:17:25 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,412,1498546800"; d="scan'208";a="303179108" From: "Liang, Kan" To: Peter Zijlstra CC: "mingo@redhat.com" , "linux-kernel@vger.kernel.org" , "acme@kernel.org" , "jolsa@redhat.com" , "tglx@linutronix.de" , "eranian@google.com" , "ak@linux.intel.com" Subject: RE: [PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR Thread-Topic: [PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR Thread-Index: AQHTF4UsqecasEDGFUSsTMnxyenm4KKQHSYAgACG6CA= Date: Tue, 22 Aug 2017 17:15:35 +0000 Message-ID: <37D7C6CF3E00A74B8858931C1DB2F0775378A21B@SHSMSX103.ccr.corp.intel.com> References: <1502993843-6837-1-git-send-email-kan.liang@intel.com> <20170822170736.GI32112@worktop.programming.kicks-ass.net> In-Reply-To: <20170822170736.GI32112@worktop.programming.kicks-ass.net> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZDM1OTkxZjgtNTM1Ni00YWJiLTk0OTAtY2RmNDhhMWJmNGQwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6InBZZUJkMDdwQkN1dzBwV05iN0NyUlAzbVF4N2VxNVh0S2IyU2NvZUNuVm89In0= x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2108 Lines: 63 > On Thu, Aug 17, 2017 at 02:17:23PM -0400, kan.liang@intel.com wrote: > > diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c > > index a322fed..f0e8d9c 100644 > > --- a/arch/x86/events/intel/ds.c > > +++ b/arch/x86/events/intel/ds.c > > @@ -1065,6 +1065,35 @@ static inline u64 intel_hsw_transaction(struct > pebs_record_skl *pebs) > > return txn; > > } > > > > +static u64 dla_to_phys(u64 dla) > > +{ > > + u64 phys_addr = 0; > > + struct page *p = NULL; > > + > > + if (dla >= TASK_SIZE) { > > + /* If it's vmalloc()d memory, leave phys_addr as 0 */ > > + if (virt_addr_valid(dla) && > > + !(dla >= VMALLOC_START && dla < VMALLOC_END)) > > + phys_addr = (u64)virt_to_phys((void *)(uintptr_t)dla); > > + } else { > > + /* > > + * Walking the pages tables for user address. > > + * Interrupts are disabled, so it prevents any tear down > > + * of the page tables. > > + * Try IRQ-safe __get_user_pages_fast first. > > + * If failed, leave phys_addr as 0. > > + */ > > + if ((current->mm != NULL) && > > + (__get_user_pages_fast(dla, 1, 0, &p) == 1)) > > + phys_addr = page_to_phys(p) + dla % PAGE_SIZE; > > + > > + if (p) > > + put_page(p); > > + } > > + > > + return phys_addr; > > +} > > Is this in any way x86 specific? AFAICT this should work in generic code as > long as data->addr is provided. No, it's not X86 specific. I think it can be used as generic code to convert virtual address to physical address. Thanks, Kan > > > static void setup_pebs_sample_data(struct perf_event *event, > > struct pt_regs *iregs, void *__pebs, > > struct perf_sample_data *data, @@ - > 1179,6 +1208,9 @@ static > > void setup_pebs_sample_data(struct perf_event *event, > > x86_pmu.intel_cap.pebs_format >= 1) > > data->addr = pebs->dla; > > > > + if ((sample_type & PERF_SAMPLE_PHYS_ADDR) && (data->addr != 0)) > > + data->phys_addr = dla_to_phys(data->addr); > > + > > if (x86_pmu.intel_cap.pebs_format >= 2) { > > /* Only set the TSX weight when no memory weight. */ > > if ((sample_type & PERF_SAMPLE_WEIGHT) && !fll) >