Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932377AbdHWQKW (ORCPT ); Wed, 23 Aug 2017 12:10:22 -0400 Received: from mail-sn1nam02on0059.outbound.protection.outlook.com ([104.47.36.59]:37620 "EHLO NAM02-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932204AbdHWQKS (ORCPT ); Wed, 23 Aug 2017 12:10:18 -0400 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com; From: Dong Aisheng To: CC: , , , , , , , , , Dong Aisheng Subject: [PATCH 0/7] PM / OPP: per OPP node clock support and imx7ulp cpufreq driver Date: Thu, 24 Aug 2017 00:10:03 +0800 Message-ID: <1503504610-12880-1-git-send-email-aisheng.dong@nxp.com> X-Mailer: git-send-email 2.7.4 X-EOPAttributedMessage: 0 X-Matching-Connectors: 131479782156804002;(91ab9b29-cfa4-454e-5278-08d120cd25b8);() X-Forefront-Antispam-Report: CIP:192.88.168.50;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(336005)(39860400002)(39380400002)(2980300002)(1110001)(1109001)(339900001)(189002)(199003)(50466002)(626005)(6916009)(48376002)(5003940100001)(106466001)(85426001)(105606002)(47776003)(305945005)(6666003)(498600001)(53936002)(5660300001)(86362001)(4326008)(2351001)(7416002)(8656003)(68736007)(81156014)(8936002)(189998001)(36756003)(77096006)(33646002)(8676002)(110136004)(97736004)(81166006)(50226002)(50986999)(2906002)(54906002)(104016004)(356003);DIR:OUT;SFP:1101;SCL:1;SRVR:MWHPR03MB3325;H:tx30smr01.am.freescale.net;FPR:;SPF:Fail;PTR:InfoDomainNonexistent;MX:1;A:1;LANG:en; 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MX7ULP supports HSRUN mode (528 Mhz), RUN mode (413 Mhz) and VLPR mode (restricted to FIRC clock, usually 48 Mhz). This patch adds the cpufreq driver support for HSRUN and RUN mode. When in different modes, the A7 core is using different clocks: RUN: clk run_divcore HSRUN: clk hsrun_divcore Thus, this driver replies on the newly added features in OPP core framework patch 1~6: e.g. "PM / OPP: use OPP node clock to set CPU frequency" And since IMX7ULP CPU clock setting is different from the generic set OPP clock, we also implemented a private set_clk function. Dong Aisheng (7): PM / OPP: Add platform specific set_clk function dt-bindings: PM / OPP: add clocks per OPP node support PM / OPP: rename opp_table->clk to opp_table->cur_clk PM / OPP: use OPP node clock to set CPU frequency PM / OPP: Add dev_pm_opp_get_cur_clk() cpufreq: make cpufreq_generic_init transition_latency default to CPUFREQ_ETERNAL cpufreq: add imx7ulp cpufreq driver Documentation/devicetree/bindings/opp/opp.txt | 52 ++++++ drivers/base/power/opp/core.c | 155 ++++++++++++++--- drivers/base/power/opp/of.c | 8 + drivers/base/power/opp/opp.h | 11 +- drivers/cpufreq/Kconfig.arm | 8 + drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq.c | 2 + drivers/cpufreq/imx7ulp-cpufreq.c | 234 ++++++++++++++++++++++++++ include/linux/pm_opp.h | 16 ++ 9 files changed, 466 insertions(+), 21 deletions(-) create mode 100644 drivers/cpufreq/imx7ulp-cpufreq.c -- 2.7.4