Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752989AbdHXJwr (ORCPT ); Thu, 24 Aug 2017 05:52:47 -0400 Received: from ozlabs.org ([103.22.144.67]:53673 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752293AbdHXJwn (ORCPT ); Thu, 24 Aug 2017 05:52:43 -0400 From: Michael Ellerman To: Peter Zijlstra Cc: kan.liang@intel.com, mingo@redhat.com, linux-kernel@vger.kernel.org, acme@kernel.org, jolsa@redhat.com, tglx@linutronix.de, eranian@google.com, ak@linux.intel.com, maddy@linux.vnet.ibm.com Subject: Re: [PATCH V6] perf: Add PERF_SAMPLE_PHYS_ADDR In-Reply-To: <20170824085628.h322ipomh4u4zpwh@hirez.programming.kicks-ass.net> References: <1503498166-3887-1-git-send-email-kan.liang@intel.com> <20170823143308.v27pgjagxjyd65ci@hirez.programming.kicks-ass.net> <87378hycw6.fsf@concordia.ellerman.id.au> <20170824085628.h322ipomh4u4zpwh@hirez.programming.kicks-ass.net> User-Agent: Notmuch/0.21 (https://notmuchmail.org) Date: Thu, 24 Aug 2017 19:52:41 +1000 Message-ID: <87k21twavq.fsf@concordia.ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1844 Lines: 60 Peter Zijlstra writes: > On Thu, Aug 24, 2017 at 11:26:17AM +1000, Michael Ellerman wrote: >> Peter Zijlstra writes: >> >> diff --git a/kernel/events/core.c b/kernel/events/core.c >> >> index d704e23..b991af3 100644 >> >> --- a/kernel/events/core.c >> >> +++ b/kernel/events/core.c >> >> @@ -6027,6 +6033,38 @@ void perf_output_sample(struct perf_output_handle *handle, >> >> } >> >> } >> >> >> >> +static u64 perf_virt_to_phys(u64 virt) >> >> +{ >> >> + u64 phys_addr = 0; >> >> + struct page *p = NULL; >> >> + >> >> + if (!virt) >> >> + return 0; >> >> + >> >> + if (virt >= TASK_SIZE) { >> >> + /* If it's vmalloc()d memory, leave phys_addr as 0 */ >> >> + if (virt_addr_valid(virt) && >> >> + !(virt >= VMALLOC_START && virt < VMALLOC_END)) >> >> + phys_addr = (u64)virt_to_phys((void *)(uintptr_t)virt); >> >> + } else { >> >> + /* >> >> + * Walking the pages tables for user address. >> >> + * Interrupts are disabled, so it prevents any tear down >> >> + * of the page tables. >> >> + * Try IRQ-safe __get_user_pages_fast first. >> >> + * If failed, leave phys_addr as 0. >> >> + */ >> >> + if ((current->mm != NULL) && >> >> + (__get_user_pages_fast(virt, 1, 0, &p) == 1)) >> >> + phys_addr = page_to_phys(p) + virt % PAGE_SIZE; >> >> + >> >> + if (p) >> >> + put_page(p); >> >> + } >> >> + >> >> + return phys_addr; >> >> +} >> > >> > Michael, does this work for PPC as is? >> >> I think so. >> >> We have about 8 MMUs and 32-bit and 64-bit so it's a bit hard to say for >> sure. > > You can limit it to those that include a PMU that supports data->addr, > which is book3s, whatever that gets you. True. That's just hash and radix. So that looks OK to me. At least OK enough to merge and we'll try and test it ASAP to confirm it works. cheers