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Subject: Re: [PATCH 1/4] KVM: VMX: cache secondary exec controls
To: Jim Mattson <jmattson@google.com>
Cc: LKML <linux-kernel@vger.kernel.org>, kvm list <kvm@vger.kernel.org>
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From: Paolo Bonzini <pbonzini@redhat.com>
Message-ID: <b441c811-f35e-5233-fef9-a7b5c0ca8a92@redhat.com>
Date: Thu, 24 Aug 2017 18:08:53 +0200
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On 24/08/2017 18:02, Jim Mattson wrote:
> On the subject of complexity, why do we clear
> CPUID.(EAX=07H,ECX=0):EBX.INVPCID[bit 10] when CPUID.01H:ECX.PCID[bit
> 17] is clear? Sure, it would be odd to support the INVPCID instruction
> without also supporting PCIDs, but why single out this one check?
> Isn't it equally bizarre to support SSE2 without SSE, or XSAVES
> without XSAVE, or RDTSCP without TSC, or DS-CPL without DS, or ...?

I actually agree with you.  It's just been like this forever:

    commit ad756a1603c5fac207758faaac7f01c34c9d0b7b
    Author: Mao, Junjie <junjie.mao@intel.com>
    Date:   Mon Jul 2 01:18:48 2012 +0000

    KVM: VMX: Implement PCID/INVPCID for guests with EPT

Paolo