Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753681AbdHXVHd (ORCPT ); Thu, 24 Aug 2017 17:07:33 -0400 Received: from mail-oi0-f51.google.com ([209.85.218.51]:33606 "EHLO mail-oi0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753314AbdHXVHa (ORCPT ); Thu, 24 Aug 2017 17:07:30 -0400 MIME-Version: 1.0 In-Reply-To: <1503418256-5215-1-git-send-email-oleksandrs@mellanox.com> References: <1503418256-5215-1-git-send-email-oleksandrs@mellanox.com> From: Linus Walleij Date: Thu, 24 Aug 2017 23:07:29 +0200 Message-ID: Subject: Re: [patch v6 0/3] JTAG driver introduction To: Oleksandr Shamray Cc: Greg KH , Arnd Bergmann , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , OpenBMC Maillist , Joel Stanley , jiri@resnulli.us, Tobias Klauser , "linux-serial@vger.kernel.org" , mec@shout.net, vadimp@maellanox.com, system-sw-low-level@mellanox.com, Rob Herring , openocd-devel-owner@lists.sourceforge.net, "linux-api@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 954 Lines: 27 On Tue, Aug 22, 2017 at 6:10 PM, Oleksandr Shamray wrote: > SoC which are not equipped with JTAG master interface, can be built > on top of JTAG core driver infrastructure, by applying bit-banging of > TDI, TDO, TCK and TMS pins within the hardware specific driver. I guess you mean it should then use GPIO lines for bit-banging? I was wondering about how some JTAG clients like openOCD does this in some cases. In my worst nightmare they export GPIO lines using the horrid ABI in /sys/gpio/* In best case they use the GPIO character device or even libgpiod. But having a JTAG abstraction inside the kernel that can grab a few lines for JTAG defined in a device tree, ACPI DSDT or similar makes sense too, as it abstracts the hardware so the JTAG client can then just open whatever /dev/jtag0 is on the machine and go ahead without having to bother about what GPIO lines are connected exactly where. Yours, Linus Walleij