Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754900AbdHYQxj (ORCPT ); Fri, 25 Aug 2017 12:53:39 -0400 Received: from mga05.intel.com ([192.55.52.43]:16112 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754797AbdHYQxi (ORCPT ); Fri, 25 Aug 2017 12:53:38 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,426,1498546800"; d="scan'208";a="1188161932" Message-ID: <1503680015.25945.113.camel@linux.intel.com> Subject: Re: [PATCH] x86/platform/intel-mid: make several arrays static, makes code smaller From: Andy Shevchenko To: Colin King , Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , x86@kernel.org, Lukas Wunner , Bjorn Helgaas Cc: kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org Date: Fri, 25 Aug 2017 19:53:35 +0300 In-Reply-To: <20170825163206.23250-1-colin.king@canonical.com> References: <20170825163206.23250-1-colin.king@canonical.com> Organization: Intel Finland Oy Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6-1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1800 Lines: 57 On Fri, 2017-08-25 at 17:32 +0100, Colin King wrote: > From: Colin Ian King > > Don't populate arrays on the stack, instead make them static . > Makes the object code smaller by 76 bytes: > > Before: >    text    data     bss     dec     hex > filename >    4217    1540     128    5885    16fd > arch/x86/platform/intel-mid/pwr.o > > After: >    text    data     bss     dec     hex > filename >    3981    1700     128    5809    16b1 > arch/x86/platform/intel-mid/pwr.o Fine by me. Reviewed-by: Andy Shevchenko > > Signed-off-by: Colin Ian King > --- >  arch/x86/platform/intel-mid/pwr.c | 4 ++-- >  1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/platform/intel-mid/pwr.c > b/arch/x86/platform/intel-mid/pwr.c > index ef03852ea6e8..49ec5b94c71f 100644 > --- a/arch/x86/platform/intel-mid/pwr.c > +++ b/arch/x86/platform/intel-mid/pwr.c > @@ -444,7 +444,7 @@ static int mid_set_initial_state(struct mid_pwr > *pwr, const u32 *states) >  static int pnw_set_initial_state(struct mid_pwr *pwr) >  { >   /* On Penwell SRAM must stay powered on */ > - const u32 states[] = { > + static const u32 states[] = { >   0xf00fffff, /* PM_SSC(0) */ >   0xffffffff, /* PM_SSC(1) */ >   0xffffffff, /* PM_SSC(2) */ > @@ -455,7 +455,7 @@ static int pnw_set_initial_state(struct mid_pwr > *pwr) >   >  static int tng_set_initial_state(struct mid_pwr *pwr) >  { > - const u32 states[] = { > + static const u32 states[] = { >   0xffffffff, /* PM_SSC(0) */ >   0xffffffff, /* PM_SSC(1) */ >   0xffffffff, /* PM_SSC(2) */ -- Andy Shevchenko Intel Finland Oy