Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935498AbdHYXSW (ORCPT ); Fri, 25 Aug 2017 19:18:22 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:49156 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932550AbdHYXSU (ORCPT ); Fri, 25 Aug 2017 19:18:20 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3F1A060708 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Fri, 25 Aug 2017 16:18:18 -0700 From: Stephen Boyd To: Shawn Guo Cc: Kiran Gunda , gregkh@linuxfoundation.org, Rob Herring , Mark Rutland , Abhijeet Dharmapurikar , David Collins , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-msm-owner@vger.kernel.org Subject: Re: [PATCH V2] spmi: pmic-arb: Enforce the ownership check optionally Message-ID: <20170825231818.GP21656@codeaurora.org> References: <1503070110-15018-1-git-send-email-kgunda@codeaurora.org> <20170822085541.GB3685@dragon> <20170822203132.GC21656@codeaurora.org> <20170824121818.GE3685@dragon> <20170824183701.GN21656@codeaurora.org> <20170825074324.GF3685@dragon> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170825074324.GF3685@dragon> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2460 Lines: 60 On 08/25, Shawn Guo wrote: > On Thu, Aug 24, 2017 at 11:37:01AM -0700, Stephen Boyd wrote: > > On 08/24, Shawn Guo wrote: > > > On Tue, Aug 22, 2017 at 01:31:32PM -0700, Stephen Boyd wrote: > > > > Also, I see that on v4.13-rc series the read/write checks are > > > > causing the led driver to fail in a different way: > > > > > > > > spmi spmi-0: error: impermissible write to peripheral sid:0 addr:0xc040 > > > > qcom-spmi-gpio 200f000.spmi:pm8916@0:gpios@c000: write 0x40 failed > > > > leds-gpio soc:leds: Error applying setting, reverse things back > > > > spmi spmi-0: error: impermissible write to peripheral sid:0 addr:0xc041 > > > > qcom-spmi-gpio 200f000.spmi:pm8916@0:gpios@c000: write 0x41 failed > > > > leds-gpio: probe of soc:leds failed with error -1 > > > > > > > > Are you seeing similar behavior? > > > > > > Yes. I forgot to mention that, and leds-gpio failure is gone after > > > applying Kiran's patch below. > > > > > > spmi: pmic-arb: remove the read/write access checks > > > > > > > Sure. Removing the checks will silence the warnings, but it still > > means that we're attempting to configure GPIOs that we shouldn't > > be configuring. > > The driver is attempting to configure the GPIOs that device tree tells > to. > > led@3 { > label = "apq8016-sbc:green:user3"; > gpios = <&pm8916_gpios 1 GPIO_ACTIVE_HIGH>; > linux,default-trigger = "mmc1"; > default-state = "off"; > }; > > Are you saying, in case of user3 led above, device tree shouldn't use > GPIO <&pm8916_gpios 1> there at all? Right. Does the GPIO work? If so, it sounds like the read/write access checks in spmi pmic arb don't work properly. > > > Is there some sort of default configuration that > > gets applied to all pins by default? > > I do not quite understand what you are asking and how that is related to > the thing we discuss here. But my understanding is that spmi_arb > read/write access is used not only by pinctrl API to set up pinmux for > GPIO function, but also by GPIO API to actually drive the GPIO. > Ah I got confused because I thought we numbered GPIO pins from 0, but on the PMIC we number from 1. I see that base = -1 assignment now. I thought that all pins on the pmic were being configured somewhere because I didn't see a gpio 0 usage in DT. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project