Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751436AbdH0VhM (ORCPT ); Sun, 27 Aug 2017 17:37:12 -0400 Received: from mail.efficios.com ([167.114.142.141]:53961 "EHLO mail.efficios.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751368AbdH0VhK (ORCPT ); Sun, 27 Aug 2017 17:37:10 -0400 From: Mathieu Desnoyers To: "Paul E . McKenney" Cc: linux-kernel@vger.kernel.org, Mathieu Desnoyers , Peter Zijlstra , Chris Zankel , Max Filippov , linux-xtensa@linux-xtensa.org Subject: [PATCH] Fix: xtensa: add missing sync_core Date: Sun, 27 Aug 2017 14:36:59 -0700 Message-Id: <20170827213659.29210-1-mathieu.desnoyers@efficios.com> X-Mailer: git-send-email 2.11.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1207 Lines: 37 The membarrier system call now requires all architectures to implement sync_core(). On Xtensa, it is provided by the EXTW instruction. [ Completely untested! Can someone on the xtensa side confirm whether EXTW is the right way to serialize core execution and try it out ? ] Signed-off-by: Mathieu Desnoyers CC: Peter Zijlstra CC: Paul E. McKenney CC: Chris Zankel CC: Max Filippov CC: linux-xtensa@linux-xtensa.org --- arch/xtensa/include/asm/processor.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h index 30ee8c608853..b435bd6adbd6 100644 --- a/arch/xtensa/include/asm/processor.h +++ b/arch/xtensa/include/asm/processor.h @@ -248,5 +248,14 @@ static inline unsigned long get_er(unsigned long addr) #endif /* XCHAL_HAVE_EXTERN_REGS */ +static inline void sync_core(void) +{ + /* + * Synchronize the core execution pipeline. Acts as a compiler + * barrier. + */ + asm volatile ("extw" : : : "memory"); +} + #endif /* __ASSEMBLY__ */ #endif /* _XTENSA_PROCESSOR_H */ -- 2.11.0