Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751705AbdH1OVY (ORCPT ); Mon, 28 Aug 2017 10:21:24 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:55358 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751613AbdH1OVR (ORCPT ); Mon, 28 Aug 2017 10:21:17 -0400 From: Amelie Delaunay To: Greg Kroah-Hartman , Rob Herring , Mark Rutland , Russell King , Maxime Coquelin , Alexandre Torgue , John Youn CC: , , , , Benjamin Gaignard , Amelie Delaunay Subject: [PATCHv2 6/7] ARM: dts: stm32: Add USB FS support for STM32F746 MCU Date: Mon, 28 Aug 2017 16:20:17 +0200 Message-ID: <1503930018-536-7-git-send-email-amelie.delaunay@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1503930018-536-1-git-send-email-amelie.delaunay@st.com> References: <1503930018-536-1-git-send-email-amelie.delaunay@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.20.5] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-08-28_08:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1369 Lines: 58 This patch adds the USB pins and nodes for USB FS core on STM32F746 SoC. Signed-off-by: Amelie Delaunay --- arch/arm/boot/dts/stm32f746.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index 5d0cc72..b605445 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -401,6 +401,28 @@ slew-rate = <2>; }; }; + + usbotg_fs_pins_a: usbotg-fs@0 { + pins { + pinmux = , + , + ; + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + }; + + usbotg_fs_pins_b: usbotg-fs@1 { + pins { + pinmux = , + , + ; + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + }; }; crc: crc@40023000 { @@ -429,6 +451,15 @@ clock-names = "otg"; status = "disabled"; }; + + usbotg_fs: usb@50000000 { + compatible = "st,stm32f4x9-fsotg"; + reg = <0x50000000 0x40000>; + interrupts = <67>; + clocks = <&rcc 0 STM32F7_AHB2_CLOCK(OTGFS)>; + clock-names = "otg"; + status = "disabled"; + }; }; }; -- 2.7.4