Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751455AbdH2Ilr (ORCPT ); Tue, 29 Aug 2017 04:41:47 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:5029 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750779AbdH2Iln (ORCPT ); Tue, 29 Aug 2017 04:41:43 -0400 From: Li Wei To: , , , , , , , , , , , , , , , , , , , , CC: , Subject: [PATCH v3 2/5] dt-bindings: scsi: ufs: add document for hisi-ufs Date: Tue, 29 Aug 2017 16:41:13 +0800 Message-ID: <20170829084116.106695-3-liwei213@huawei.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170829084116.106695-1-liwei213@huawei.com> References: <20170829084116.106695-1-liwei213@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [100.107.89.192] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090203.59A528BC.008E,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 46925d46b84f73d2059701949ca0cab6 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1871 Lines: 51 add ufs node document for Hisilicon Signed-off-by: Li Wei --- Documentation/devicetree/bindings/ufs/ufs-hisi.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt diff --git a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt new file mode 100644 index 000000000000..cfc84c821d50 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt @@ -0,0 +1,35 @@ +* Hisilicon Universal Flash Storage (UFS) Host Controller + +UFS nodes are defined to describe on-chip UFS hardware macro. +Each UFS Host Controller should have its own node. + +Required properties: +- compatible : compatible list, contains one of the following - + "hisilicon,hi3660-ufs" for hisi ufs host controller + present on Hi3660 chipset. +- reg : should contain UFS register address space & UFS SYS CTRL register address, +- interrupt-parent : interrupt device +- interrupts : interrupt number +- clocks : List of phandle and clock specifier pairs +- clock-names : List of clock input name strings sorted in the same + order as the clocks property. "clk_ref", "clk_phy" is optional + +Optional properties for board device: +- reset-gpio : specifies to reset devices + +Example: + + ufs: ufs@ff3b0000 { + compatible = "jedec,ufs-1.1", "hisilicon,hi3660-ufs"; + /* 0: HCI standard */ + /* 1: UFS SYS CTRL */ + reg = <0x0 0xff3b0000 0x0 0x1000>, + <0x0 0xff3b1000 0x0 0x1000>; + interrupt-parent = <&gic>; + interrupts = ; + clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>, + <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>; + clock-names = "clk_ref", "clk_phy"; + freq-table-hz = <0 0>, <0 0>; + reset-gpio = <&gpio18 1 0>; + } -- 2.11.0