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Date: Tue, 29 Aug 2017 11:49:55 -0300
From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: Li Bin <huawei.libin@huawei.com>
Cc: Namhyung Kim <namhyung@kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Masami Hiramatsu <mhiramat@kernel.org>,
        Hemant Kumar <hemant@linux.vnet.ibm.com>, alexis.berlemont@gmail.com,
        dtolnay@gmail.com, Milian Wolff <milian.wolff@kdab.com>,
        Wang Nan <wangnan0@huawei.com>, guohanjun@huawei.com,
        zhangmengting@huawei.com
Subject: Re: [PATCH] perf symbols: Fix plt entry calculation for ARM and
 AARCH64
Message-ID: <20170829144955.GA4831@kernel.org>
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Em Tue, Jun 06, 2017 at 10:47:26AM +0900, Namhyung Kim escreveu:
> On Mon, Jun 5, 2017 at 9:34 AM, Li Bin <huawei.libin@huawei.com> wrote:
> > On x86, the plt header size is as same as the plt entry size, and
> > can be identified from shdr's sh_entsize of the plt.
> > But we cann't assume that the sh_entsize of the plt shdr is always
> > the plt entry size in all architecture, and the plt header size may
> > be not as same as the plt entry size in some architecure.
> >
> > On ARM, the plt header size is 20 bytes and the plt entry size is 12
> > bytes(don't consider the FOUR_WORD_PLT case)
> > that refer to the binutils implementation.
<SNIP>
> > NOTES:
> > In addition to ARM and AARCH64, other architectures, such as
> > s390/alpha/mips/parisc/poperpc/sh/sparc/xtensa also need to consider
> > this issue.
> >
> > Signed-off-by: Li Bin <huawei.libin@huawei.com>
> 
> I don't know other archs, but this change looks ok to me..
> 
> Acked-by: Namhyung Kim <namhyung@kernel.org>

Thanks, and sorry for the delay in processing this one.

- Arnaldo