Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753271AbdH2LYu (ORCPT ); Tue, 29 Aug 2017 07:24:50 -0400 Received: from terminus.zytor.com ([65.50.211.136]:35141 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753244AbdH2LYh (ORCPT ); Tue, 29 Aug 2017 07:24:37 -0400 Date: Tue, 29 Aug 2017 04:18:51 -0700 From: tip-bot for Thomas Gleixner Message-ID: Cc: luto@kernel.org, tglx@linutronix.de, mingo@kernel.org, peterz@infradead.org, rostedt@goodmis.org, linux-kernel@vger.kernel.org, hpa@zytor.com, brgerst@gmail.com, jpoimboe@redhat.com, bp@alien8.de, torvalds@linux-foundation.org, dvlasenk@redhat.com Reply-To: mingo@kernel.org, luto@kernel.org, tglx@linutronix.de, peterz@infradead.org, rostedt@goodmis.org, torvalds@linux-foundation.org, dvlasenk@redhat.com, bp@alien8.de, brgerst@gmail.com, jpoimboe@redhat.com, hpa@zytor.com, linux-kernel@vger.kernel.org In-Reply-To: <20170828064959.091328949@linutronix.de> References: <20170828064959.091328949@linutronix.de> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/apic] x86/idt: Move IST stack based traps to table init Git-Commit-ID: 90f6225fba0c732f3f5f9f5e265bdefa021ff12d X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3549 Lines: 105 Commit-ID: 90f6225fba0c732f3f5f9f5e265bdefa021ff12d Gitweb: http://git.kernel.org/tip/90f6225fba0c732f3f5f9f5e265bdefa021ff12d Author: Thomas Gleixner AuthorDate: Mon, 28 Aug 2017 08:47:52 +0200 Committer: Ingo Molnar CommitDate: Tue, 29 Aug 2017 12:07:27 +0200 x86/idt: Move IST stack based traps to table init Initialize the IST based traps via a table. Signed-off-by: Thomas Gleixner Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Brian Gerst Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Josh Poimboeuf Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Steven Rostedt Link: http://lkml.kernel.org/r/20170828064959.091328949@linutronix.de Signed-off-by: Ingo Molnar --- arch/x86/include/asm/desc.h | 2 ++ arch/x86/kernel/idt.c | 22 ++++++++++++++++++++++ arch/x86/kernel/traps.c | 9 +-------- 3 files changed, 25 insertions(+), 8 deletions(-) diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h index 930acd5..e624527 100644 --- a/arch/x86/include/asm/desc.h +++ b/arch/x86/include/asm/desc.h @@ -509,9 +509,11 @@ extern void idt_setup_early_traps(void); #ifdef CONFIG_X86_64 extern void idt_setup_early_pf(void); +extern void idt_setup_ist_traps(void); extern void idt_setup_debugidt_traps(void); #else static inline void idt_setup_early_pf(void) { } +static inline void idt_setup_ist_traps(void) { } static inline void idt_setup_debugidt_traps(void) { } #endif diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c index f5281b8..a6326fd 100644 --- a/arch/x86/kernel/idt.c +++ b/arch/x86/kernel/idt.c @@ -92,6 +92,20 @@ struct desc_ptr idt_descr __ro_after_init = { gate_desc debug_idt_table[IDT_ENTRIES] __page_aligned_bss; /* + * The exceptions which use Interrupt stacks. They are setup after + * cpu_init() when the TSS has been initialized. + */ +static const __initdata struct idt_data ist_idts[] = { + ISTG(X86_TRAP_DB, debug, DEBUG_STACK), + ISTG(X86_TRAP_NMI, nmi, NMI_STACK), + ISTG(X86_TRAP_BP, int3, DEBUG_STACK), + ISTG(X86_TRAP_DF, double_fault, DOUBLEFAULT_STACK), +#ifdef CONFIG_X86_MCE + ISTG(X86_TRAP_MC, &machine_check, MCE_STACK), +#endif +}; + +/* * Override for the debug_idt. Same as the default, but with interrupt * stack set to DEFAULT_STACK (0). Required for NMI trap handling. */ @@ -158,6 +172,14 @@ void __init idt_setup_early_pf(void) } /** + * idt_setup_ist_traps - Initialize the idt table with traps using IST + */ +void __init idt_setup_ist_traps(void) +{ + idt_setup_from_table(idt_table, ist_idts, ARRAY_SIZE(ist_idts)); +} + +/** * idt_setup_debugidt_traps - Initialize the debug idt table with debug traps */ void __init idt_setup_debugidt_traps(void) diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 1492bf5..293f5bd 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -979,14 +979,7 @@ void __init trap_init(void) */ cpu_init(); - /* - * X86_TRAP_DB and X86_TRAP_BP have been set - * in early_trap_init(). However, ITS works only after - * cpu_init() loads TSS. See comments in early_trap_init(). - */ - set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK); - /* int3 can be called from all */ - set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK); + idt_setup_ist_traps(); x86_init.irqs.trap_init();