Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752153AbdH3DBi (ORCPT ); Tue, 29 Aug 2017 23:01:38 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:36779 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752111AbdH3DB0 (ORCPT ); Tue, 29 Aug 2017 23:01:26 -0400 From: Philipp Rossak X-Google-Original-From: Philipp Rossak < embed3d@gmail.com > To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, wens@csie.org Cc: Philipp Rossak , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 7/7] ARM: dts: sun8i: h3: Enable AP6212 BT on uart3 on Nanopi M1 Plus Date: Wed, 30 Aug 2017 05:01:10 +0200 Message-Id: <1504062070-13523-8-git-send-email-embed3d@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1504062070-13523-1-git-send-email-embed3d@gmail.com> References: <1504062070-13523-1-git-send-email-embed3d@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 902 Lines: 37 From: Philipp Rossak The BT side of the AP6212 WiFi/BT combo module is connected to uart3. Enable BT on this board by enabling uart3 with using additionally the cts and rts pins. Signed-off-by: Philipp Rossak --- arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts index 3054308..8c12419 100644 --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts @@ -49,6 +49,7 @@ aliases { ethernet0 = &emac; ethernet1 = &ap6212; + serial1 = &uart3; }; reg_gmac_3v3: gmac-3v3 { @@ -135,3 +136,9 @@ function = "gpio_out"; }; }; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>; + status = "okay"; +}; -- 2.7.4