Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752179AbdH3DBz (ORCPT ); Tue, 29 Aug 2017 23:01:55 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:38478 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751902AbdH3DBZ (ORCPT ); Tue, 29 Aug 2017 23:01:25 -0400 From: Philipp Rossak X-Google-Original-From: Philipp Rossak < embed3d@gmail.com > To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, wens@csie.org Cc: Philipp Rossak , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 6/7] ARM: dts: sun8i: h3: Adding UART3 RTS and CTS Pins Date: Wed, 30 Aug 2017 05:01:09 +0200 Message-Id: <1504062070-13523-7-git-send-email-embed3d@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1504062070-13523-1-git-send-email-embed3d@gmail.com> References: <1504062070-13523-1-git-send-email-embed3d@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 707 Lines: 29 From: Philipp Rossak This node adds the definition for the UART3 RTS and CTS Pins That makes it able to use UART3 with RTS and CTS. Signed-off-by: Philipp Rossak --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index d38282b..7f750ef 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -381,6 +381,11 @@ pins = "PA13", "PA14"; function = "uart3"; }; + + uart3_rts_cts_pins: uart3_rts_cts { + pins = "PA15", "PA16"; + function = "uart3"; + }; }; timer@01c20c00 { -- 2.7.4