Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751464AbdH3JUq (ORCPT ); Wed, 30 Aug 2017 05:20:46 -0400 Received: from ozlabs.org ([103.22.144.67]:36655 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751295AbdH3JUo (ORCPT ); Wed, 30 Aug 2017 05:20:44 -0400 From: Michael Ellerman To: Geert Uytterhoeven , David Airlie , Rob Herring , Mark Rutland , Carlo Caione , Kevin Hilman , Chanho Min , Catalin Marinas , Will Deacon Cc: Neil Armstrong , Benjamin Herrenschmidt , Paul Mackerras , dri-devel@lists.freedesktop.org, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Geert Uytterhoeven Subject: Re: [PATCH v3 3/6] dt: booting-without-of: DT fix s/#interrupt-cell/#interrupt-cells/ In-Reply-To: <1496407129-13527-4-git-send-email-geert+renesas@glider.be> References: <1496407129-13527-1-git-send-email-geert+renesas@glider.be> <1496407129-13527-4-git-send-email-geert+renesas@glider.be> User-Agent: Notmuch/0.21 (https://notmuchmail.org) Date: Wed, 30 Aug 2017 19:20:39 +1000 Message-ID: <87wp5l1kew.fsf@concordia.ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 961 Lines: 26 Geert Uytterhoeven writes: > Signed-off-by: Geert Uytterhoeven > Acked-by: Rob Herring > --- Rob this has your ack, but I'd expect it to go via your tree? Or should I grab it? cheers > diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt > index 280d283304bb82d8..f35d3adacb987f7d 100644 > --- a/Documentation/devicetree/booting-without-of.txt > +++ b/Documentation/devicetree/booting-without-of.txt > @@ -1309,7 +1309,7 @@ number and level/sense information. All interrupt children in an > OpenPIC interrupt domain use 2 cells per interrupt in their interrupts > property. > > -The PCI bus binding specifies a #interrupt-cell value of 1 to encode > +The PCI bus binding specifies a #interrupt-cells value of 1 to encode > which interrupt pin (INTA,INTB,INTC,INTD) is used. > > 2) interrupt-parent property > -- > 2.7.4