Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751363AbdH3Vvq (ORCPT ); Wed, 30 Aug 2017 17:51:46 -0400 Received: from mail-wr0-f194.google.com ([209.85.128.194]:36947 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750860AbdH3Vvo (ORCPT ); Wed, 30 Aug 2017 17:51:44 -0400 Subject: Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus To: Maxime Ripard Cc: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, wens@csie.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com References: <1504062070-13523-1-git-send-email-embed3d@gmail.com> <1504062070-13523-5-git-send-email-embed3d@gmail.com> <20170830145211.snicbwdytobtd7ro@flea.lan> From: Philipp Rossak Message-ID: <89e3d5f8-1b31-bf86-4a6b-aee454c0b85f@gmail.com> Date: Wed, 30 Aug 2017 23:51:37 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <20170830145211.snicbwdytobtd7ro@flea.lan> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2054 Lines: 76 Hi, thanks for the feedback I will rework the patch. Should I also update the sun8i-h3-bananapi-m2-plus.dts? It uses also the AP6212 and it is done in the same way like in this patch. Am 30.08.2017 um 16:52 schrieb Maxime Ripard: > Hi, > > On Wed, Aug 30, 2017 at 05:01:07AM +0200, Philipp Rossak wrote: >> From: Philipp Rossak >> >> The WiFi side of the AP6212 WiFi/BT combo module is connected to >> mmc1. There are also GPIOs for enable and interrupts. >> >> Enable WiFi on this board by enabling mmc1 and adding the power >> sequencing clocks and GPIO, as well as the chip's interrupt line. >> >> Signed-off-by: Philipp Rossak >> --- >> arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 35 +++++++++++++++++++++++++++ >> 1 file changed, 35 insertions(+) >> >> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts >> index b9c6c27..3054308 100644 >> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts >> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts >> @@ -48,6 +48,7 @@ >> >> aliases { >> ethernet0 = &emac; >> + ethernet1 = &ap6212; >> }; >> >> reg_gmac_3v3: gmac-3v3 { >> @@ -59,6 +60,14 @@ >> enable-active-high; >> gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; >> }; >> + >> + wifi_pwrseq: wifi_pwrseq { >> + compatible = "mmc-pwrseq-simple"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&wifi_en_npi_m1p>; > > There's no need for pinctrl nodes when the pin is set to a GPIO. > >> + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ >> + }; >> + >> }; >> >> &ehci1 { >> @@ -93,6 +102,25 @@ >> }; >> }; >> >> +&mmc1 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&mmc1_pins_a>; >> + vmmc-supply = <®_vcc3v3>; >> + vqmmc-supply = <®_vcc3v3>; > > You don't need vqmmc in this case. > >> + mmc-pwrseq = <&wifi_pwrseq>; >> + bus-width = <4>; >> + non-removable; >> + status = "okay"; >> + >> + ap6212: sdio_wifi@1 { > > You're sure you need a label here? > > Thanks! > Maxime >