Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751431AbdHaLoM (ORCPT ); Thu, 31 Aug 2017 07:44:12 -0400 Received: from mail-io0-f193.google.com ([209.85.223.193]:33082 "EHLO mail-io0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751074AbdHaLoH (ORCPT ); Thu, 31 Aug 2017 07:44:07 -0400 X-Google-Smtp-Source: ADKCNb5ghw/FQn+97aWkEDgXtoqF9d+O+oDX900XMq05waxyfIHEDcXHTA8Z4QsV5YxjLYBsnR+oy7b/o7tv/wxYoxM= MIME-Version: 1.0 In-Reply-To: <20170830233609.13855-4-stefan.bruens@rwth-aachen.de> References: <20170830233609.13855-1-stefan.bruens@rwth-aachen.de> <20170830233609.13855-4-stefan.bruens@rwth-aachen.de> From: Code Kipper Date: Thu, 31 Aug 2017 13:44:05 +0200 Message-ID: Subject: Re: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64 To: =?UTF-8?Q?Stefan_Br=C3=BCns?= Cc: linux-sunxi , devicetree , dmaengine@vger.kernel.org, Vinod Koul , linux-arm-kernel , linux-kernel , Maxime Ripard , Chen-Yu Tsai , Rob Herring Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by nfs id v7VBiGbN020778 Content-Length: 3208 Lines: 71 On 31 August 2017 at 01:36, Stefan Brüns wrote: > The A64 SoC has the same dma engine as the H3 (sun8i), with a > reduced amount of physical channels. Add the proper config data > and compatible string to support it. > > Signed-off-by: Stefan Brüns > --- > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++ > drivers/dma/sun6i-dma.c | 7 +++++++ > 2 files changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index f96287d3043a..b86019238b77 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -494,6 +494,8 @@ > interrupts = ; > clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; > clock-names = "ahb", "mod"; > + dmas = <&dma 23>, <&dma 23>; > + dma-names = "rx", "tx"; Hi Stefan, the dtsi parts should be in a separate patch > pinctrl-names = "default"; > pinctrl-0 = <&spi0_pins>; > resets = <&ccu RST_BUS_SPI0>; > @@ -509,6 +511,8 @@ > interrupts = ; > clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; > clock-names = "ahb", "mod"; > + dmas = <&dma 24>, <&dma 24>; > + dma-names = "rx", "tx"; > pinctrl-names = "default"; > pinctrl-0 = <&spi1_pins>; > resets = <&ccu RST_BUS_SPI1>; > diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c > index 5f4eee4513e5..6a17c5d63582 100644 > --- a/drivers/dma/sun6i-dma.c > +++ b/drivers/dma/sun6i-dma.c > @@ -1068,6 +1068,12 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = { > .nr_max_vchans = 34, > .dmac_variant = DMAC_VARIANT_H3, > }; > + > +static struct sun6i_dma_config sun50i_a64_dma_cfg = { > + .nr_max_channels = 8, > + .nr_max_requests = 27, > + .nr_max_vchans = 38, > + .dmac_variant = DMAC_VARIANT_H3, > }; > > static const struct of_device_id sun6i_dma_match[] = { > @@ -1075,6 +1081,7 @@ static const struct of_device_id sun6i_dma_match[] = { > { .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg }, > { .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg }, > { .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg }, > + { .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg }, This all looks fine...it's similar to my patch here https://github.com/codekipper/linux-sunxi/commit/8c54d9852dfad6ceb478c579a1213f38fb12fa80 which I've been too lazy to post. I think the binding documentation should go with this patch and this should also be the 1st patch in the series, followed by the dtsi changes. BR, CK > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, sun6i_dma_match); > -- > 2.14.1 >