Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751485AbdHaN0d (ORCPT ); Thu, 31 Aug 2017 09:26:33 -0400 Received: from mail-oi0-f49.google.com ([209.85.218.49]:35832 "EHLO mail-oi0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751382AbdHaN0a (ORCPT ); Thu, 31 Aug 2017 09:26:30 -0400 X-Google-Smtp-Source: ADKCNb6oG3V/RKZVrTJ7C96XlTyuPf9imjxva+av4n/LedAL0xndwI2rajm+Q/CMdDF5uVFYnlJAQxMyCkkVe1JlEYE= MIME-Version: 1.0 In-Reply-To: <1503475207-30288-1-git-send-email-david.wu@rock-chips.com> References: <1503475207-30288-1-git-send-email-david.wu@rock-chips.com> From: Linus Walleij Date: Thu, 31 Aug 2017 15:26:28 +0200 Message-ID: Subject: Re: [PATCH v2] pinctrl: rockchip: Add rv1108 recalculated iomux support To: David Wu Cc: =?UTF-8?Q?Heiko_St=C3=BCbner?= , Tao Huang , Andy Yan , "open list:ARM/Rockchip SoC..." , "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 344 Lines: 12 On Wed, Aug 23, 2017 at 10:00 AM, David Wu wrote: > The pins from GPIO1A0 to GPIO1B1 are special, need to recalculate > iomux. And the register offset is larger than the u8 range, so changed > to u32. > > Signed-off-by: David Wu Patch applied with Heiko's review tag. Yours, Linus Walleij