Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751630AbdHaO7O (ORCPT ); Thu, 31 Aug 2017 10:59:14 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:54250 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751359AbdHaO7M (ORCPT ); Thu, 31 Aug 2017 10:59:12 -0400 Date: Thu, 31 Aug 2017 16:58:59 +0200 From: Maxime Ripard To: Antony Antony Cc: Chen-Yu Tsai , Icenowy Zheng , linux-sunxi@googlegroups.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List Subject: Re: [PATCH v5] arm64: allwinner: h5: add support for NanoPi NEO Plus2 Message-ID: <20170831145859.rief3fqo36ns23rm@flea> References: <20170824231716.2623-1-antony@phenome.org> <20170830125057.38529-1-antony@phenome.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="rhe3huqp3kdurwsx" Content-Disposition: inline In-Reply-To: <20170830125057.38529-1-antony@phenome.org> User-Agent: NeoMutt/20170714 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 11121 Lines: 382 --rhe3huqp3kdurwsx Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Wed, Aug 30, 2017 at 02:50:57PM +0200, Antony Antony wrote: > Add initial DT support for NanoPi NEO Plus2 by FriendlyARM > Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU > 1 GB DDR3 RAM > 8GB eMMC flash (Samsung KLM8G1WEPD-B031) > micro SD card slot > Gigabit Ethernet (external RTL8211E-VB-CG chip) > 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module) > 2x USB 2.0 host ports & 2x USB via headers This indendation is weird > The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2 > Added dwmac-sun8i Gigabit Ethernet support based on > Nano Pi Neo2 DT and the schematics. And that's outdated. > Signed-off-by: Antony Antony > --- > arch/arm64/boot/dts/allwinner/Makefile | 1 + > .../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 262 +++++++++++++++= ++++++ > 2 files changed, 263 insertions(+) > create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-pl= us2.dts >=20 > --- > Changes > v1 -> v2 > add wifi power controller, mmc1, mmc2 > remove reg_usb0_vbus > v2 -> v3 > fix typo s/orangepi/nanopi/, s/pus/plus/ > usb_otg set to host mode > wifi fix, based on commit 442e1f7e brcm,bcm43xx-fmac.txt > remove functions on header pins: spi, ir, ehci 1&2, ohci 1&2, uart 1&2 > remove hdmi, de2, r-gpio-keys, mixer - not supported the board > v3->v4 update WiFi chip compatible to bcm43430-fmac > v4->v5 back to bcm4329-fmac bcm43430-fmac is the wrong way. > =20 > diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts= /allwinner/Makefile > index 108f12c..e6810c8 100644 > --- a/arch/arm64/boot/dts/allwinner/Makefile > +++ b/arch/arm64/boot/dts/allwinner/Makefile > @@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h5-orangepi-pc2.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h5-orangepi-prime.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h5-orangepi-zero-plus2.dtb > dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h5-nanopi-neo2.dtb > +dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h5-nanopi-neo-plus2.dtb > =20 > always :=3D $(dtb-y) > subdir-y :=3D $(dts-dirs) > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts= b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts > new file mode 100644 > index 0000000..a6687db > --- /dev/null > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts > @@ -0,0 +1,262 @@ > +/* > + * Copyright (C) 2017 Antony Antony > + * Copyright (C) 2016 ARM Ltd. > + * > + * This file is dual-licensed: you can use it either under the terms > + * of the GPL or the X11 license, at your option. Note that this dual > + * licensing only applies to this file, and not this project as a > + * whole. > + * > + * a) This file is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of the > + * License, or (at your option) any later version. > + * > + * This file is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * Or, alternatively, > + * > + * b) Permission is hereby granted, free of charge, to any person > + * obtaining a copy of this software and associated documentation > + * files (the "Software"), to deal in the Software without > + * restriction, including without limitation the rights to use, > + * copy, modify, merge, publish, distribute, sublicense, and/or > + * sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following > + * conditions: > + * > + * The above copyright notice and this permission notice shall be > + * included in all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + */ > + > +/dts-v1/; > +#include "sun50i-h5.dtsi" > + > +#include > +#include > +#include > + > +/ { > + model =3D "FriendlyARM NanoPi NEO Plus2"; > + compatible =3D "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5"; > + > + reg_vcc3v3: vcc3v3 { > + compatible =3D "regulator-fixed"; > + regulator-name =3D "vcc3v3"; > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + }; > + > + aliases { > + ethernet0 =3D &emac; > + serial0 =3D &uart0; > + }; > + > + chosen { > + stdout-path =3D "serial0:115200n8"; > + }; > + > + leds { > + compatible =3D "gpio-leds"; > + > + pwr { > + label =3D "nanopi:green:pwr"; > + gpios =3D <&r_pio 0 10 GPIO_ACTIVE_HIGH>; > + default-state =3D "on"; > + }; > + > + status { > + label =3D "nanopi:red:status"; > + gpios =3D <&pio 0 20 GPIO_ACTIVE_HIGH>; > + }; > + }; > + > + reg_gmac_3v3: gmac-3v3 { > + compatible =3D "regulator-fixed"; > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&gmac_power_pin_nanopi>; > + regulator-name =3D "gmac-3v3"; > + regulator-min-microvolt =3D <3300000>; > + regulator-max-microvolt =3D <3300000>; > + startup-delay-us =3D <100000>; > + enable-active-high; > + gpio =3D <&pio 3 6 GPIO_ACTIVE_HIGH>; > + }; > + > + vdd_cpux: gpio-regulator { > + compatible =3D "regulator-gpio"; > + > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&vdd_cpux_r_npi>; > + > + regulator-name =3D "vdd-cpux"; > + regulator-type =3D "voltage"; > + regulator-boot-on; > + regulator-always-on; > + regulator-min-microvolt =3D <1100000>; > + regulator-max-microvolt =3D <1300000>; > + regulator-ramp-delay =3D <50>; /* 4ms */ > + > + gpios =3D <&r_pio 0 6 GPIO_ACTIVE_HIGH>; > + gpios-states =3D <0x1>; > + states =3D <1100000 0x0 > + 1300000 0x1>; > + }; > + > + wifi_pwrseq: wifi_pwrseq { > + compatible =3D "mmc-pwrseq-simple"; > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&wifi_en_npi>; > + reset-gpios =3D <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ > + post-power-on-delay-ms =3D <200>; > + }; You should order these nodes alphabetically. > +&codec { > + allwinner,audio-routing =3D > + "Line Out", "LINEOUT", > + "MIC1", "Mic", > + "Mic", "MBIAS"; > + status =3D "okay"; > +}; > + > +&ehci0 { > + status =3D "okay"; > +}; > + > +&ehci3 { > + status =3D "okay"; > +}; > + > +&emac { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&emac_rgmii_pins>; > + phy-supply =3D <®_gmac_3v3>; > + phy-handle =3D <&ext_rgmii_phy>; > + phy-mode =3D "rgmii"; > + status =3D "okay"; > +}; > + > +&mdio { > + ext_rgmii_phy: ethernet-phy@7 { > + compatible =3D "ethernet-phy-ieee802.3-c22"; > + reg =3D <7>; > + }; > +}; This will not compile. > +&mmc0 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&mmc0_pins_a>, <&mmc0_cd_pin>; > + vmmc-supply =3D <®_vcc3v3>; > + bus-width =3D <4>; > + cd-gpios =3D <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ > + status =3D "okay"; > +}; > + > +&mmc1 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&mmc1_pins_a>; > + vmmc-supply =3D <®_vcc3v3>; > + vqmmc-supply =3D <®_vcc3v3>; > + mmc-pwrseq =3D <&wifi_pwrseq>; > + bus-width =3D <4>; > + non-removable; > + boot_device =3D <0>; This property is not documented anywhere, I'm not sure what it's here for. > + status =3D "okay"; > + > + /* > + * AMPAK AP6212A WiFi module with BCM43430, rev=3D1 inside > + * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6 > + * There is no specific Documentation: dt-binding for BCM43430 > + * brcm,bcm4329-fmac compatible can initialize this module > + */ This is not really relevant. > + brcmf: wifi@1 { > + reg =3D <1>; > + compatible =3D "brcm,bcm4329-fmac"; > + }; > +}; > + > +&mmc2 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&mmc2_8bit_pins>; > + vmmc-supply =3D <®_vcc3v3>; > + bus-width =3D <8>; > + non-removable; > + cap-mmc-hw-reset; > + boot_device =3D <0>; > + status =3D "okay"; > +}; > + > +&mmc2_8bit_pins { > + /* Increase drive strength for DDR modes */ > + drive-strength =3D <40>; It's very likely that you actually don't need 40mA > + /* eMMC is missing pull-ups */ > + bias-pull-up; > +}; And that one is already here by default. > +&ohci0 { > + status =3D "okay"; > +}; > + > +&ohci3 { > + status =3D "okay"; > +}; > + > +&pio { > + leds_npi: led_pins@0 { > + pins =3D "PA10"; > + function =3D "gpio_out"; > + }; > + gmac_power_pin_nanopi: gmac_power_pin@0 { > + pins =3D "PD6"; > + function =3D "gpio_out"; > + }; > +}; You don't need these nodes > + > +&r_pio { > + leds_r_npi: led_pins@0 { > + pins =3D "PL10"; > + function =3D "gpio_out"; > + }; > + > + vdd_cpux_r_npi: regulator_pins@0 { > + allwinner,pins =3D "PL6"; > + allwinner,function =3D "gpio_out"; > + allwinner,drive =3D ; > + allwinner,pull =3D ; > + }; > + > + wifi_en_npi: wifi_en_pin { > + pins =3D "PL7"; > + function =3D "gpio_out"; > + }; > +}; Or those. > + > +&uart0 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&uart0_pins_a>; > + status =3D "okay"; > +}; > + > +&usb_otg { > + dr_mode =3D "host"; > + status =3D "okay"; > +}; > + > +&usbphy { > + /* USB Type-A ports' VBUS is always on */ > + usb0_id_det-gpios =3D <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ If it has an ID-detect pin, then it's not a host-only USB OTG controller. dr_mode should be set to otg. Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com --rhe3huqp3kdurwsx Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIcBAEBAgAGBQJZqCQzAAoJEBx+YmzsjxAg3AMP/iKB51Fm4JTqehzKGkiOAfTR 7JXmaiNHiDBqSEQ/pj13O9JSIiRZPaMcWJYaEn6oBpZAwfHKphiHiyG8NrUII+9H W9L33cHjBcdG+rxUGf6wUakjS0wSlAjyJr0xxuryUiqpvDmbfIfVqS4xdic1f5Es cxr5M00LyF6KJk8dE27ehBcYbnCuChJsn2txBRa6QIP2BrM5V1abn5VGSfX2qfKT FYJZN4ha9U7JVKEYfrt8OtdAOuLJ734kMbzi5yTy14cawC9Zc9AT23jrTrHsweJ0 13HbCpP4D/jKe4VBLP3/1oyH+od+yQjagxI+3s5Ru1+3Bb0DV90SivnlACw6+a6g UpwoNKrQlFbTpXSOFrK5c8YqdBwosgVep5EZ4y5Vuhs9J/EoxwMakbvG022PUG9/ bmZzvq5QF/Ad2ICRDacJ9D/X1veduwmB7cKrIndHIirfhrsfY5pHK1GiI4Wfij1E yVnHX5PkcAqwzVBEqghYgOCvdX/p2s7Z7AHCePD4MLDdfvfLbzYWmTQHU86v5fqC XKD3SYkLaNCq1GnSAHXqdvffwqxh/KhHpLhCvMsYY165xVQNmP5nY86etCVgyVzZ Zd7oi6IcDQ4tLvjoxsUitm8udvW6cfkXCqSGYUggaxIK7QxHCS/HqubnW99wKbvm J11YFL1iEsIRqIfd6qpF =9boM -----END PGP SIGNATURE----- --rhe3huqp3kdurwsx--