Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751660AbdIAH4W (ORCPT ); Fri, 1 Sep 2017 03:56:22 -0400 Received: from mail-io0-f194.google.com ([209.85.223.194]:32915 "EHLO mail-io0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751564AbdIAH4U (ORCPT ); Fri, 1 Sep 2017 03:56:20 -0400 X-Google-Smtp-Source: ADKCNb5BEl7YafFR6CuM88/MQ9KuffSKFM4jwk1cze+m/kKZMZQ0ii0uqm90JIX2iDHQU8wx2uHRpg== From: Bin Meng To: Mika Westerberg , Cyrille Pitchen , Marek Vasut , Boris Brezillon , Brian Norris , Richard Weinberger , David Woodhouse , linux-mtd , linux-kernel Cc: Stefan Roese Subject: [PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements Date: Fri, 1 Sep 2017 01:00:31 -0700 Message-Id: <1504252841-2445-1-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.9.5 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1634 Lines: 34 This series does several bug fixes and clean ups against the intel-spi spi-nor driver, as well as enhancements to make the driver independent on the underlying BIOS/bootloader. At present the driver uses the HW sequencer for the read/write/erase on all supported platforms, read_reg/write_reg for BXT, and the SW sequencer for read_reg/write_reg for BYT/LPT. The way the driver uses the HW and SW sequencer relies on some programmed register settings and hence creates unneeded dependencies with the underlying BIOS/bootloader. For example, the driver unfortunately does not work as expected when booting from Intel Baytrail FSP based bootloaders like U-Boot, as the Baytrail FSP does not set up some SPI controller settings to make the driver happy. Now such limitation has been removed with this series. Bin Meng (10): spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT spi-nor: intel-spi: Remove useless 'buf' parameter in the HW/SW cycle spi-nor: intel-spi: Fix broken software sequencing codes spi-nor: intel-spi: Check transfer length in the HW/SW cycle spi-nor: intel-spi: Use SW sequencer for BYT/LPT spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in intel_spi_write() spi-nor: intel-spi: Don't assume OPMENU0/1 to be programmed by BIOS spi-nor: intel-spi: Remove the unnecessary HSFSTS register RW spi-nor: intel-spi: Rename swseq to swseq_reg in 'struct intel_spi' spi-nor: intel-spi: Fall back to use SW sequencer to erase drivers/mtd/spi-nor/intel-spi.c | 209 +++++++++++++++++++++++++++++----------- 1 file changed, 151 insertions(+), 58 deletions(-) -- 2.9.2