Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751911AbdIAJ7Y (ORCPT ); Fri, 1 Sep 2017 05:59:24 -0400 Received: from mga04.intel.com ([192.55.52.120]:14244 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751687AbdIAJ7X (ORCPT ); Fri, 1 Sep 2017 05:59:23 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,457,1498546800"; d="scan'208";a="896171596" Date: Fri, 1 Sep 2017 12:52:47 +0300 From: Mika Westerberg To: Bin Meng Cc: Cyrille Pitchen , Marek Vasut , Boris Brezillon , Brian Norris , Richard Weinberger , David Woodhouse , linux-mtd , linux-kernel , Stefan Roese Subject: Re: [PATCH 10/10] spi-nor: intel-spi: Fall back to use SW sequencer to erase Message-ID: <20170901095247.GY2598@lahna.fi.intel.com> References: <1504252841-2445-1-git-send-email-bmeng.cn@gmail.com> <1504252841-2445-11-git-send-email-bmeng.cn@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1504252841-2445-11-git-send-email-bmeng.cn@gmail.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.8.3 (2017-05-23) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 454 Lines: 12 On Fri, Sep 01, 2017 at 01:00:41AM -0700, Bin Meng wrote: > /* > + * Determine whether erase operatoin should use HW or SW sequencer. ^^^^^^^^^ Typo > + * > + * The HW sequencer has a predefined list of opcodes, with only the > + * erase opcode being programmable in LVSCC and UVSCC registers. > + * If these registers don't contain a valid erase opcode, erase > + * cannot be done using HW sequencer. > + */