Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751411AbdIBCCR convert rfc822-to-8bit (ORCPT ); Fri, 1 Sep 2017 22:02:17 -0400 Received: from mail-out-1.itc.rwth-aachen.de ([134.130.5.46]:29281 "EHLO mail-out-1.itc.rwth-aachen.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750855AbdIBCCQ (ORCPT ); Fri, 1 Sep 2017 22:02:16 -0400 X-IronPort-AV: E=Sophos;i="5.41,461,1498514400"; d="scan'208";a="11443706" From: Stefan Bruens To: =?ISO-8859-1?Q?Andr=E9?= Przywara CC: , Maxime Ripard , Chen-Yu Tsai , , , Vinod Koul , Rob Herring , , Subject: Re: [PATCH 3/3] dmaengine: sun6i: Add support for Allwinner A64 Date: Sat, 2 Sep 2017 04:02:12 +0200 Message-ID: <2607878.Us0MSlEf6n@pebbles.site> In-Reply-To: References: <20170830233609.13855-4-stefan.bruens@rwth-aachen.de> <1837534.s5pz9jWHnV@pebbles.site> MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain; charset="iso-8859-1" X-Originating-IP: [77.182.61.44] X-ClientProxiedBy: rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) To rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1725 Lines: 55 On Samstag, 2. September 2017 00:32:50 CEST Andr? Przywara wrote: > Hi, > > On 01/09/17 02:19, Stefan Bruens wrote: > > On Freitag, 1. September 2017 02:31:35 CEST Andre Przywara wrote: > >> Hi, > >> > >> On 31/08/17 00:36, Stefan Br?ns wrote: > >>> The A64 SoC has the same dma engine as the H3 (sun8i), with a > >>> reduced amount of physical channels. Add the proper config data > >>> and compatible string to support it. > >> > >> ... > >> > >>> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c > >>> index 5f4eee4513e5..6a17c5d63582 100644 > >>> --- a/drivers/dma/sun6i-dma.c > >>> +++ b/drivers/dma/sun6i-dma.c > >>> @@ -1068,6 +1068,12 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = > >>> { > >>> > >>> .nr_max_vchans = 34, > >>> .dmac_variant = DMAC_VARIANT_H3, > >>> > >>> }; > >>> > >>> + > >>> +static struct sun6i_dma_config sun50i_a64_dma_cfg = { > >>> + .nr_max_channels = 8, > >>> + .nr_max_requests = 27, > >>> + .nr_max_vchans = 38, > >>> + .dmac_variant = DMAC_VARIANT_H3, > >>> > >>> }; > >>> [...] > > There are also the incompatibilities in the "DMA channel configuration > > register" (burst length; burst width; burst length field offset). > > > > We can either have 3 different compatible strings, or another property for > > the register model. > > The latter is usually frowned upon, using separate compatible strings > for each group of SoCs is the way to go here. Just for clarification, I was not talking about a property in the devicetree, but about a struct member in the config data, i.e. the .dmac_variant above. Kind regards, Stefan -- Stefan Br?ns / Bergstra?e 21 / 52062 Aachen home: +49 241 53809034 mobile: +49 151 50412019