Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1753866AbdIDObE convert rfc822-to-8bit (ORCPT <rfc822;w@1wt.eu>);
        Mon, 4 Sep 2017 10:31:04 -0400
Received: from mail-out-1.itc.rwth-aachen.de ([134.130.5.46]:37916 "EHLO
        mail-out-1.itc.rwth-aachen.de" rhost-flags-OK-OK-OK-OK)
        by vger.kernel.org with ESMTP id S1753811AbdIDObC (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Mon, 4 Sep 2017 10:31:02 -0400
X-IronPort-AV: E=Sophos;i="5.41,475,1498514400"; 
   d="scan'208";a="11732468"
From: =?iso-8859-1?Q?Br=FCns=2C_Stefan?= <Stefan.Bruens@rwth-aachen.de>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
CC: "linux-sunxi@googlegroups.com" <linux-sunxi@googlegroups.com>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
        Vinod Koul <vinod.koul@intel.com>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
        Code Kipper <codekipper@gmail.com>,
        Andre Przywara <andre.przywara@arm.com>
Subject: Re: [PATCH 05/10] dmaengine: sun6i: Move number of
 pchans/vchans/request to device struct
Thread-Topic: [PATCH 05/10] dmaengine: sun6i: Move number of
 pchans/vchans/request to device struct
Thread-Index: AQHTJVQiHWxigx6IpESEb/WdFlPCf6KkqKqA
Date: Mon, 4 Sep 2017 14:30:59 +0000
Message-ID: <3533197.81BdoSVRz8@sbruens-linux>
References: <20170903224100.17893-1-stefan.bruens@rwth-aachen.de>
 <20170903224100.17893-6-stefan.bruens@rwth-aachen.de>
 <20170904074355.niloziky42aki7bg@flea>
In-Reply-To: <20170904074355.niloziky42aki7bg@flea>
Accept-Language: en-US, de-DE
Content-Language: en-US
X-MS-Has-Attach: 
X-MS-TNEF-Correlator: 
x-ms-exchange-messagesentrepresentingtype: 1
x-ms-exchange-transport-fromentityheader: Hosted
x-originating-ip: [78.35.13.203]
Content-Type: text/plain; charset="iso-8859-1"
Content-ID: <625A3A4542C11445B4DBEC50806D6BE1@rwth-ad.de>
Content-Transfer-Encoding: 8BIT
MIME-Version: 1.0
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
Content-Length: 1383
Lines: 32

On Montag, 4. September 2017 09:43:55 CEST Maxime Ripard wrote:
> On Mon, Sep 04, 2017 at 12:40:56AM +0200, Stefan Br?ns wrote:
> > Preparatory patch: If the same compatible is used for different SoCs which
> > have a common register layout, but different number of channels, the
> > channel count can no longer be stored in the config. Store it in the
> > device structure instead.
> > 
> > Signed-off-by: Stefan Br?ns <stefan.bruens@rwth-aachen.de>
> 
> As stated already, we already are going to have a different
> compatible, and this is not something that will change from one
> instance to the other. Having code is therefore:
>   A) Making the code more complex
>   B) For no particular reason.

If the dma channel count (which is a standard dma binding, likely for a 
reason) goes into the devicetree, it has to be moved out of the config.

The R40 (which has register manuals available) has the same register layout as 
the A64, but *does* have a different channel count. So you think it is a good 
idea to introduce a new compatible again?

If you had been half as picky when merging the H3 and A83T support, we would 
not have this mess now.

There is also the H6, where there is no register manual available yet, but I  
bet it has the H3 (and A64, H5, R40) register layout, but unlikely the same 
number of DMA channels *and* the same number of ports.

Regards,

Stefan