Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752530AbdIERA6 (ORCPT ); Tue, 5 Sep 2017 13:00:58 -0400 Received: from mx02-sz.bfs.de ([194.94.69.103]:30316 "EHLO mx02-sz.bfs.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752408AbdIERA5 (ORCPT ); Tue, 5 Sep 2017 13:00:57 -0400 Message-ID: <59AED841.2010709@bfs.de> Date: Tue, 05 Sep 2017 19:00:49 +0200 From: walter harms Reply-To: wharms@bfs.de User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; de; rv:1.9.1.16) Gecko/20101125 SUSE/3.0.11 Thunderbird/3.0.11 MIME-Version: 1.0 To: Colin King CC: Greg Kroah-Hartman , simran singhal , Derek Robson , devel@driverdev.osuosl.org, kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] staging: rtl8192u: fix incorrect mask when calculating TxPowerLevelCCK References: <20170905163247.21875-1-colin.king@canonical.com> In-Reply-To: <20170905163247.21875-1-colin.king@canonical.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1428 Lines: 37 Am 05.09.2017 18:32, schrieb Colin King: > From: Colin Ian King > > The mask of 0xff and right shift of 8 bits on ret always results in > a value of 0 for TxPowerLevelCCK. I believe this should be a mask of > 0xff00, however I do not have the hardware at hand to test this out, > so there is a distinct possibility I may be wrong on this. > > Detected by CoverityScan CID#1357110 ("Operands don't affect result") > > Signed-off-by: Colin Ian King > --- > drivers/staging/rtl8192u/r8192U_core.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c > index 46b3f19e0878..ecc887636173 100644 > --- a/drivers/staging/rtl8192u/r8192U_core.c > +++ b/drivers/staging/rtl8192u/r8192U_core.c > @@ -2510,7 +2510,7 @@ static int rtl8192_read_eeprom_info(struct net_device *dev) > ret = eprom_read(dev, (EEPROM_TxPwIndex_CCK >> 1)); > if (ret < 0) > return ret; > - priv->EEPROMTxPowerLevelCCK = ((u16)ret & 0xff) >> 8; > + priv->EEPROMTxPowerLevelCCK = ((u16)ret & 0xff00) >> 8; Is there any need for the mask ? (u16) will already reduce ret to 16 bit, the >>8 will shift the lower bits into nirwana re, wh > } else > priv->EEPROMTxPowerLevelCCK = 0x10; > RT_TRACE(COMP_EPROM, "CCK Tx Power Levl: 0x%02x\n", priv->EEPROMTxPowerLevelCCK);