Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755561AbdIFQr6 (ORCPT ); Wed, 6 Sep 2017 12:47:58 -0400 Received: from esa4.microchip.iphmx.com ([68.232.154.123]:18250 "EHLO esa4.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754099AbdIFQrw (ORCPT ); Wed, 6 Sep 2017 12:47:52 -0400 X-IronPort-AV: E=Sophos;i="5.42,484,1500966000"; d="scan'208";a="6592146" From: To: CC: , , , , , , , Subject: RE: [PATCH] DSA support for Micrel KSZ8895 Thread-Topic: [PATCH] DSA support for Micrel KSZ8895 Thread-Index: AQHTFmUILMOBRlgQ+UGowV0gtD3ZkaKHec+AgAAFzQCAEStLAIAAv9fagADsVICAAScjgIAB/ocwgAqs7ACAAAVUIA== Date: Wed, 6 Sep 2017 16:47:35 +0000 Message-ID: <93AF473E2DA327428DE3D46B72B1E9FD41120E4D@CHN-SV-EXMX02.mchp-main.com> References: <20170816075524.GA18532@amd> <20170816140451.GA13006@lunn.ch> <9235D6609DB808459E95D78E17F2E43D40AFF8C1@CHN-SV-EXMX02.mchp-main.com> <20170827123658.GA727@amd> <20170827163122.GG13622@lunn.ch> <20170828070232.GA18135@amd> <20170828140927.GD10418@lunn.ch> <20170829074547.GB31303@amd> <93AF473E2DA327428DE3D46B72B1E9FD4111FA48@CHN-SV-EXMX02.mchp-main.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.10.76.4] Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id v86Gm2ss015536 Content-Length: 2407 Lines: 55 > -----Original Message----- > From: Maxim Uvarov [mailto:muvarov@gmail.com] > Sent: Wednesday, September 06, 2017 2:15 AM > To: Tristram Ha - C24268 > Cc: Pavel Machek; Woojung Huh - C21699; Nathan Conrad; Vivien Didelot; > Florian Fainelli; netdev; linux-kernel@vger.kernel.org; Andrew Lunn > Subject: Re: [PATCH] DSA support for Micrel KSZ8895 > > 2017-08-31 0:32 GMT+03:00 : > >> On Mon 2017-08-28 16:09:27, Andrew Lunn wrote: > >> > > I may be confused here, but AFAICT: > >> > > > >> > > 1) Yes, it has standard layout when accessed over MDIO. > >> > > >> > > >> > Section 4.8 of the datasheet says: > >> > > >> > All the registers defined in this section can be also accessed > >> > via the SPI interface. > >> > > >> > Meaning all PHY registers can be access via the SPI interface. So > >> > you should be able to make a standard Linux MDIO bus driver which > >> > performs SPI reads. > >> > >> As far as I can tell (and their driver confirms) -- yes, all those > >> registers can be accessed over the SPI, they are just shuffled > >> around... hence MDIO emulation code. I copied it from their code (see > >> the copyrights) so no, I don't believe there's nicer solution. > >> > >> Best regards, > >> > >> > >> Pavel > > > > Can you hold on your developing work on KSZ8895 driver? I am afraid your > effort may be in vain. We at Microchip are planning to release DSA drivers > for all KSZ switches, starting at KSZ8795, then KSZ8895, and KSZ8863. > > > > The driver files all follow the structures of the current KSZ9477 DSA driver, > and the file tag_ksz.c will be updated to handle the tail tag of different chips, > which requires including the ksz_priv.h header. That is required > nevertheless to support using the offload_fwd_mark indication. > > > > The KSZ8795 driver will be submitted after Labor Day (9/4) if testing reveals > no problem. The KSZ8895 driver will be submitted right after that. You > should have no problem using the driver right away. > > > > Hello Tristram, is there any update for that driver? > > Maxim. > The patches are under review internally and will need to be updated and approved by Woojung before formal submission. Problem is although KSZ8795 and KSZ8895 drivers are new code and will be submitted as RFC, they depend on the change of KSZ9477 driver currently in the kernel, which require more rigorous review.