Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932425AbdIGQ2w (ORCPT ); Thu, 7 Sep 2017 12:28:52 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:32800 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932105AbdIGQ2u (ORCPT ); Thu, 7 Sep 2017 12:28:50 -0400 From: Jean-Philippe Brucker Subject: Re: [RFC PATCH 0/6] Add platform device SVM support for ARM SMMUv3 To: Bob Liu , Yisheng Xie Cc: joro@8bytes.org, robh+dt@kernel.org, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, hanjun.guo@linaro.org, sudeep.holla@arm.com, rjw@rjwysocki.net, lenb@kernel.org, will.deacon@arm.com, robin.murphy@arm.com, robert.moore@intel.com, lv.zheng@intel.com, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devel@acpica.org, chenjiankang1@huawei.com, xieyisheng@huawei.com References: <1504167642-14922-1-git-send-email-xieyisheng1@huawei.com> <95d1a9e2-1816-ff7d-9a8d-98406a6c2c22@arm.com> <2874a1f3-22f1-20d4-4009-50add127a10f@arm.com> <1d358989-48bb-ccde-d7d9-36e004bc2d78@huawei.com> Message-ID: Date: Thu, 7 Sep 2017 17:32:13 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <1d358989-48bb-ccde-d7d9-36e004bc2d78@huawei.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1191 Lines: 25 On 07/09/17 02:41, Bob Liu wrote: >> This would require some work in moving the PCI bits at the end of the >> series. I can reserve some time in the coming months to do it, but I need >> to know what to focus on. Are you able to test SSID as well? >> > > Yes, but the difficulty is our devices are on-chip integrated hardware accelerators which requires complicate driver. > You may need much time to understand the driver. > That's the same case as intel/amd SVM, the current user is their GPU :-( > > Btw, what kind of device/method do you think is ideal for testing arm-SVM? A simple, bare DMA engine would be ideal. Something just capable of performing memcpy with parameters (PASID, input IOVA, output IOVA, size) can be used for validating SVM and virtualization. You could easily create reproducible unit tests and userspace drivers. If it supports isolated channels (as in SR-IOV), even better. As you said, having a useful device like a full GPU/accelerator as opposed to a dummy validation engine makes it difficult to fully test the SMMU. However it can be helpful for evaluating driver performances and is still good enough for confirming that the IOMMU works. Thanks, Jean