Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755372AbdIGQwz (ORCPT ); Thu, 7 Sep 2017 12:52:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35910 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754850AbdIGQwy (ORCPT ); Thu, 7 Sep 2017 12:52:54 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D3DDD128E Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=alex.williamson@redhat.com Date: Thu, 7 Sep 2017 10:52:37 -0600 From: Alex Williamson To: Jan Glauber Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, david.daney@cavium.com, Jon Masters , Robert Richter , linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org Subject: Re: [PATCH v3 3/3] PCI: Avoid slot reset for Cavium cn8xxx root ports Message-ID: <20170907105237.3f025280@w520.home> In-Reply-To: <20170907074904.GB13490@hc> References: <20170830142454.10971-1-jglauber@cavium.com> <20170830142454.10971-4-jglauber@cavium.com> <20170830084012.19d91759@w520.home> <20170831094052.GA15906@hc> <20170831100130.5c8a922e@w520.home> <20170907074011.GA13490@hc> <20170907074904.GB13490@hc> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Thu, 07 Sep 2017 16:52:54 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1079 Lines: 30 On Thu, 7 Sep 2017 09:49:04 +0200 Jan Glauber wrote: > On Thu, Sep 07, 2017 at 09:40:11AM +0200, Jan Glauber wrote: > > So what if we add an additional check like: > > > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > > index fdf65a6..389db4b 100644 > > --- a/drivers/pci/pci.c > > +++ b/drivers/pci/pci.c > > @@ -4389,6 +4389,9 @@ static bool pci_slot_resetable(struct pci_slot *slot) > > { > > struct pci_dev *dev; > > > > + if (slot->bus->self & PCI_DEV_FLAGS_NO_BUS_RESET) > > + return false; > > + > > list_for_each_entry(dev, &slot->bus->devices, bus_list) { > > if (!dev->slot || dev->slot != slot) > > continue; > > Obviously I meant: > if (slot->bus->self->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET) Much better, perhaps even incorporate the bus->self check for good measure... is it possible to have a slot on a root bus? Taking different approaches for bus vs slot reset should have been a giant red flag that something is wrong. Thanks, Alex