Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932363AbdIGVRX convert rfc822-to-8bit (ORCPT ); Thu, 7 Sep 2017 17:17:23 -0400 Received: from esa2.microchip.iphmx.com ([68.232.149.84]:59574 "EHLO esa2.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755701AbdIGVRU (ORCPT ); Thu, 7 Sep 2017 17:17:20 -0400 X-IronPort-AV: E=Sophos;i="5.42,360,1500966000"; d="scan'208";a="6818715" From: To: , , , , , , , , Subject: [PATCH RFC 1/5] Add KSZ8795 switch driver support in Kconfig Thread-Topic: [PATCH RFC 1/5] Add KSZ8795 switch driver support in Kconfig Thread-Index: AdMoGypOUElArl0OQUWBYfQxvVJl9gAAwbdA Date: Thu, 7 Sep 2017 21:17:04 +0000 Message-ID: <93AF473E2DA327428DE3D46B72B1E9FD41121A79@CHN-SV-EXMX02.mchp-main.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.10.76.4] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1015 Lines: 32 From: Tristram Ha Add KSZ8795 switch support with SPI access. Signed-off-by: Tristram Ha --- diff --git a/drivers/net/dsa/microchip/Kconfig b/drivers/net/dsa/microchip/Kconfig index a8b8f59..0b6225e 100644 --- a/drivers/net/dsa/microchip/Kconfig +++ b/drivers/net/dsa/microchip/Kconfig @@ -10,3 +10,21 @@ config MICROCHIP_KSZ_SPI_DRIVER depends on MICROCHIP_KSZ && SPI help Select to enable support for registering switches configured through SPI. + +menuconfig MICROCHIP_KSZ8795 + tristate "Microchip KSZ8795 series switch support" + depends on NET_DSA + select NET_DSA_TAG_KSZ + help + This driver adds support for Microchip KSZ8795 switch chips. + +config MICROCHIP_KSZ8795_SPI_DRIVER + tristate "KSZ8795 series SPI connected switch driver" + depends on MICROCHIP_KSZ8795 && SPI + default y + help + This driver accesses KSZ8795 chip through SPI. + + It is required to use the KSZ8795 switch driver as the only access + is through SPI. +