Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753328AbdIGX2n (ORCPT ); Thu, 7 Sep 2017 19:28:43 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:61189 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751969AbdIGX2m (ORCPT ); Thu, 7 Sep 2017 19:28:42 -0400 From: Paul Burton To: Thomas Gleixner , Ralf Baechle CC: , James Hogan , Brian Norris , Jason Cooper , , Marc Zyngier , , , , Paul Burton Subject: [RFC PATCH v1 9/9] irqchip: mips-gic: Remove gic_all_vpes_local_irq_controller Date: Thu, 7 Sep 2017 16:25:42 -0700 Message-ID: <20170907232542.20589-10-paul.burton@imgtec.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170907232542.20589-1-paul.burton@imgtec.com> References: <1682867.tATABVWsV9@np-p-burton> <20170907232542.20589-1-paul.burton@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.20.1.88] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3278 Lines: 113 The gic_all_vpes_local_irq_controller irq_chip in the MIPS GIC driver is a hack which was necessary due to other drivers & MIPS arch code not using the percpu interrupt APIs to configure & control interrupts which are really percpu. This is no longer a problem - other drivers & arch code support using the percpu interrupt APIs so we can now remove the gic_all_vpes_local_irq_controller hack. Signed-off-by: Paul Burton Cc: James Hogan Cc: Jason Cooper Cc: Marc Zyngier Cc: Ralf Baechle Cc: Thomas Gleixner Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org --- drivers/irqchip/irq-mips-gic.c | 69 +++++------------------------------------- 1 file changed, 7 insertions(+), 62 deletions(-) diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index 40159ac12ac8..99dda0618599 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c @@ -337,40 +337,6 @@ static struct irq_chip gic_local_irq_controller = { .irq_unmask = gic_unmask_local_irq, }; -static void gic_mask_local_irq_all_vpes(struct irq_data *d) -{ - int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); - int i; - unsigned long flags; - - spin_lock_irqsave(&gic_lock, flags); - for (i = 0; i < gic_vpes; i++) { - write_gic_vl_other(mips_cm_vp_id(i)); - write_gic_vo_rmask(BIT(intr)); - } - spin_unlock_irqrestore(&gic_lock, flags); -} - -static void gic_unmask_local_irq_all_vpes(struct irq_data *d) -{ - int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); - int i; - unsigned long flags; - - spin_lock_irqsave(&gic_lock, flags); - for (i = 0; i < gic_vpes; i++) { - write_gic_vl_other(mips_cm_vp_id(i)); - write_gic_vo_smask(BIT(intr)); - } - spin_unlock_irqrestore(&gic_lock, flags); -} - -static struct irq_chip gic_all_vpes_local_irq_controller = { - .name = "MIPS GIC Local", - .irq_mask = gic_mask_local_irq_all_vpes, - .irq_unmask = gic_unmask_local_irq_all_vpes, -}; - static void __gic_irq_dispatch(void) { gic_handle_local_int(false); @@ -471,35 +437,14 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq, return gic_shared_irq_domain_map(d, virq, hwirq, 0); } - switch (GIC_HWIRQ_TO_LOCAL(hwirq)) { - case GIC_LOCAL_INT_TIMER: - case GIC_LOCAL_INT_PERFCTR: - case GIC_LOCAL_INT_FDC: - /* - * HACK: These are all really percpu interrupts, but - * the rest of the MIPS kernel code does not use the - * percpu IRQ API for them. - */ - err = irq_domain_set_hwirq_and_chip(d, virq, hwirq, - &gic_all_vpes_local_irq_controller, - NULL); - if (err) - return err; - - irq_set_handler(virq, handle_percpu_irq); - break; + err = irq_domain_set_hwirq_and_chip(d, virq, hwirq, + &gic_local_irq_controller, + NULL); + if (err) + return err; - default: - err = irq_domain_set_hwirq_and_chip(d, virq, hwirq, - &gic_local_irq_controller, - NULL); - if (err) - return err; - - irq_set_handler(virq, handle_percpu_devid_irq); - irq_set_percpu_devid(virq); - break; - } + irq_set_handler(virq, handle_percpu_devid_irq); + irq_set_percpu_devid(virq); return gic_local_irq_domain_map(d, virq, hwirq); } -- 2.14.1