Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755745AbdIHPPc (ORCPT ); Fri, 8 Sep 2017 11:15:32 -0400 Received: from conssluserg-06.nifty.com ([210.131.2.91]:17376 "EHLO conssluserg-06.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752538AbdIHPPa (ORCPT ); Fri, 8 Sep 2017 11:15:30 -0400 DKIM-Filter: OpenDKIM Filter v2.10.3 conssluserg-06.nifty.com v88FFQQq019546 X-Nifty-SrcIP: [209.85.161.173] X-Google-Smtp-Source: ADKCNb5o7x+6gK/AG4m58cAbr0fLaw0t2fdmKNmt4rx61SbJkpusKz648sL+Stby+0ao9nqB27lo92lnZsqan/kVT9w= MIME-Version: 1.0 In-Reply-To: References: <1504784522-26841-1-git-send-email-yamada.masahiro@socionext.com> <1504784522-26841-7-git-send-email-yamada.masahiro@socionext.com> From: Masahiro Yamada Date: Sat, 9 Sep 2017 00:14:45 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 6/6] gpio: uniphier: add UniPhier GPIO controller driver To: Rob Herring Cc: Marc Zyngier , Thomas Gleixner , Linus Walleij , "linux-gpio@vger.kernel.org" , Jassi Brar , "devicetree@vger.kernel.org" , Jason Cooper , Masami Hiramatsu , David Daney , "linux-kernel@vger.kernel.org" , Mark Rutland , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2341 Lines: 68 Hi Rob, 2017-09-08 4:41 GMT+09:00 Rob Herring : > On Thu, Sep 7, 2017 at 6:42 AM, Masahiro Yamada > wrote: >> This GPIO controller device is used on UniPhier SoCs. >> >> It also serves as an interrupt controller, but interrupt signals are >> just delivered to the parent irqchip without any latching or OR'ing. >> This is implemented by using hierarchy IRQ domain. >> >> Implementation note: >> Unfortunately, the IRQ mapping from this controller to the parent is >> random. (48, 49, ..., 63, 154, 155, ...) >> If "interrupts" property is used, IRQ resources may be statically >> allocated when platform devices are populated from DT. This can be >> a problem for the hierarchy IRQ domain because IRQ allocation must >> happen from the outer-most domain up to the root domain in order to >> build up the stacked IRQ. (https://lkml.org/lkml/2017/7/6/758) >> Solutions to work around it could be to hard-code parent hwirqs or >> to invent a driver-specific DT property. >> >> Here, the new API irq_domain_push_irq() was merged by v4.14-rc1. >> It allows to add irq_data to the existing hierarchy. It will help >> to make this driver work whether the parent has already initialized >> the hierarchy or not. >> >> Signed-off-by: Masahiro Yamada >> --- >> >> Changes in v4: >> - Add COMPILE_TEST and select IRQ_DOMAIN_HIERARCHY >> - Reimplement irqchip part by using irq_domain_push_irq() >> >> Changes in v3: >> - Add .irq_set_affinity() hook >> - Use irq_domain_create_hierarchy() instead of legacy >> irq_domain_add_hierarchy() >> >> Changes in v2: >> - Remove +32 offset for parent interrupts to follow the GIC >> binding convention >> - Let uniphier_gpio_irq_alloc() fail if nr_irqs != 1 >> - Allocate gpio_chip statically because just one instance is >> supported >> - Fix suspend and resume hooks >> >> .../devicetree/bindings/gpio/gpio-uniphier.txt | 43 ++ > > What happened to my ack? One line here more that before, but I'm not > going to diff your patches for you. I changed the binding for this version. It includes a new one you have not acked yet. Maybe I was too worried about it. > BTW, it is preferred to split bindings to a separate patch. I will do so next time. -- Best Regards Masahiro Yamada