Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756693AbdIHSPk (ORCPT ); Fri, 8 Sep 2017 14:15:40 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:17638 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755733AbdIHSPj (ORCPT ); Fri, 8 Sep 2017 14:15:39 -0400 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 08 Sep 2017 11:15:10 -0700 From: Krishna Reddy To: Robin Murphy , Joerg Roedel CC: "iommu@lists.linux-foundation.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH] iommu/dma: limit the IOVA allocated to dma-ranges region Thread-Topic: [PATCH] iommu/dma: limit the IOVA allocated to dma-ranges region Thread-Index: AQHTIqWkQ14LIpfMfkauNWCjq+EYQKKfw2WAgAAEu4CABcNMsIAFiGeAgABBTbA= Date: Fri, 8 Sep 2017 18:12:42 +0000 Message-ID: <013c5c072747482fb737b61e1e468f91@HQMAIL107.nvidia.com> References: <1504217301-17216-1-git-send-email-vdumpa@nvidia.com> <20170901092609.GL19533@8bytes.org> <3aeeb13e-045f-4cde-2cfb-62d4a879d207@arm.com> <385a0aa33013452fa7ac269cb6188b52@HQMAIL107.nvidia.com> In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [172.17.187.85] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="utf-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id v88IFjJ6031422 Content-Length: 1236 Lines: 15 >OK, so that's really just another variant of the existing problem we have with certain PCI root complexes with restrictive inbound windows. >The appropriate way to handle that is to reserve the unusable areas of the IOVA space up-front. > Since the support for the ACPI equivalent of "dma-ranges" has just landed, this is now pretty much top of my to-do-list for > the upcoming cycle (there's various things still to fix in the DT code, but that's essentially part of the same job). Reserving upfront would work. If you already have in it in to-do-list, we will wait for your patches. >In the case of a 64-bit-capable IP block with only 34 bits of address wired up externally, if that 34-bit interconnect is described by "dma-ranges" > then the device will already be created with an appropriate 34-bit DMA mask. The fact that the driver can stomp on that with a 64-bit mask later >is entirely down to the implementations of >dma_set_mask() etc. (I've had a patch to restrict masks for arm64 for a while, but I worry that it carries quite a high risk of breakage in default cases). Exactly, It is the stomping issue. dma-ranges code updates the mask earlier than sdhci code. Sdhci code is overwriting the dma mask afterwards. -KR