Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751665AbdIMCed (ORCPT ); Tue, 12 Sep 2017 22:34:33 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:26390 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750960AbdIMCe3 (ORCPT ); Tue, 12 Sep 2017 22:34:29 -0400 X-AuditID: b6c32a38-f799e6d000004f48-28-59b89908cffa Subject: Re: [PATCH v3 4/6] [media] exynos-gsc: Add hardware rotation limits To: Sylwester Nawrocki , mchehab@kernel.org Cc: inki.dae@samsung.com, airlied@linux.ie, kgene@kernel.org, krzk@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, m.szyprowski@samsung.com, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, Hoegeun Kwon From: Hoegeun Kwon Message-id: Date: Wed, 13 Sep 2017 11:33:45 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-version: 1.0 In-reply-to: <27b46679-e6c7-2471-f10e-3f0634178ebf@samsung.com> Content-type: text/plain; charset="utf-8"; format="flowed" Content-transfer-encoding: 7bit Content-language: en-US X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMJsWRmVeSWpSXmKPExsWy7bCmni7HzB2RBl9+6lr0njvJZPF+WQ+j xfwj51gtrnx9z2bxfnkXm8Wk+xNYLPofv2a2OH9+A7vFpsfXWC0u75rDZtGzYSurxYzz+5gs 1h65y26x9PpFJotlm/4wWbTuPcJucfhNO6vFy48nWByEPNbMW8PosWlVJ5vH9m8PWD3udx9n 8ti8pN6jb8sqRo/Pm+QC2KNSbTJSE1NSixRS85LzUzLz0m2VvIPjneNNzQwMdQ0tLcyVFPIS c1NtlVx8AnTdMnOA3lBSKEvMKQUKBSQWFyvp29kU5ZeWpCpk5BeX2CpFGxoa6RkamOsZGRnp mRjHWhmZApUkpGYsuBJSMFuv4texxcwNjD8Vuhg5OSQETCT2NbaxQNhiEhfurWfrYuTiEBLY wSgxa8N6RgjnO6PE5e+7mWA6/jYuZIZI7GaU+P/8L1TLXUaJaw+a2EGqhAV8JB5v/QBmiwg4 S9w4OResiFlgK7PEgdUTwUaxCehKfO25DmbzCthJfNwzmxHEZhFQlZh35SPYUaICERLbvs9g g6gRlPgx+R5YnFPAXmLV5gdgcWYBK4ln/1pZIWx5ic1r3jJD2OISza03WUAWSwhsYpe4eHQV 1A8uEr//fGSHsIUlXh3fAmRzANnSEpeO2kKE6yUu7zjJCNHbwCjRP3E2VL2xxKmuRiaIBXwS 7772sEL08kp0tAlBlHhIXGg8BzXSUaJxrjdIWEhgApPEtrvpExjlZyH5ZhaSD2Yh+WAWkg8W MLKsYhRLLSjOTU8tNiww0StOzC0uzUvXS87P3cQITtBaFjsY95zzOcQowMGoxMMbcGt7pBBr YllxZe4hRgkOZiUR3i/9OyKFeFMSK6tSi/Lji0pzUosPMZoCQ3sis5Rocj4we+SVxBuaWBqY mBkBk52loaGSOK/o+msRQgLpiSWp2ampBalFMH1MHJxSDYwakssqX+4RnqKisWKfjuDqR2z6 a6tOue162+t++za3yUnB0KNeaT3mqtuD5PuX2grqSn79wtPLYc3ffuFg44Wq9jkPrnGKLPyz ln23jPSR0rfn7DKvaxu9nHJoZuT504rLJRSnVC45ffDE4xN6fx5JzKtnOdHxLywiZM+B3Tca ZnH3qTYzn52sxFKckWioxVxUnAgAxuEtdOYDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrDIsWRmVeSWpSXmKPExsVy+t9jAV32mTsiDS78tbLoPXeSyeL9sh5G i/lHzrFaXPn6ns3i/fIuNotJ9yewWPQ/fs1scf78BnaLTY+vsVpc3jWHzaJnw1ZWixnn9zFZ rD1yl91i6fWLTBbLNv1hsmjde4Td4vCbdlaLlx9PsDgIeayZt4bRY9OqTjaP7d8esHrc7z7O 5LF5Sb1H35ZVjB6fN8kFsEdx2aSk5mSWpRbp2yVwZSy4ElIwW6/i17HFzA2MPxW6GDk5JARM JP42LmTuYuTiEBLYySjx8P53RpCEkMB9Ron//9xAbGEBH4nHWz+wg9giAs4SN07OZQNpYBbY zCxx6+AxNojuCUwSCyYeYgapYhPQlfjac50JxOYVsJP4uGc22FQWAVWJeVc+soDYogIREn1v L7ND1AhK/Jh8DyzOKWAvsWrzAzYQm1nATOLLy8OsELa8xOY1b5khbHGJ5tabLBMYBWYhaZ+F pGUWkpZZSFoWMLKsYpRMLSjOTc8tNiowzEst1ytOzC0uzUvXS87P3cQIjMNth7X6djDeXxJ/ iFGAg1GJh3fFne2RQqyJZcWVuYcYJTiYlUR4v/TviBTiTUmsrEotyo8vKs1JLT7EKM3BoiTO m9k3I1JIID2xJDU7NbUgtQgmy8TBKdXAaLf48N+wS0/CVJdKGW85b+J54pyKib+u5fbfu8Lz pG7HL4m2uRlpuuGq8N+qv68zTmfPE7205kP16uMvcjec//SoUMOs7uP/uecfluzzCl7RWF3J pJXt0nKNn6ulYe2OgwrOE5ZocyXWhzxVulVQ9UL/svqx13nMtScMmc8f2FB9bO9J01SNyUos xRmJhlrMRcWJAFGOBsy/AgAA X-CMS-MailID: 20170913023344epcas1p4ffa88f9a5c52afca61321c126f7b2191 X-Msg-Generator: CA X-Sender-IP: 182.195.42.142 X-Local-Sender: =?UTF-8?B?6raM7ZqM6re8G1RpemVuIFBsYXRmb3JtIExhYihTL1fshLw=?= =?UTF-8?B?7YSwKRvsgrzshLHsoITsnpAbRW5naW5lZXI=?= X-Global-Sender: =?UTF-8?B?SG9lZ2V1biBLd29uG1RpemVuIFBsYXRmb3JtIExhYi4bU2Ft?= =?UTF-8?B?c3VuZyBFbGVjdHJvbmljcxtFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG1RFTEUbQzEwVjgxMTE=?= CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20170908060309epcas1p3d48dd0871d3fde02ba3c9921bbe5a7a6 X-RootMTR: 20170908060309epcas1p3d48dd0871d3fde02ba3c9921bbe5a7a6 References: <1504850560-27950-1-git-send-email-hoegeun.kwon@samsung.com> <1504850560-27950-5-git-send-email-hoegeun.kwon@samsung.com> <27b46679-e6c7-2471-f10e-3f0634178ebf@samsung.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 5747 Lines: 166 Hi Sylwester, On 09/11/2017 06:35 PM, Sylwester Nawrocki wrote: > On 09/08/2017 08:02 AM, Hoegeun Kwon wrote: >> The hardware rotation limits of gsc depends on SOC (Exynos >> 5250/5420/5433). Distinguish them and add them to the driver data. >> >> Signed-off-by: Hoegeun Kwon >> --- >> drivers/media/platform/exynos-gsc/gsc-core.c | 96 >> ++++++++++++++++++++++++---- >> 1 file changed, 83 insertions(+), 13 deletions(-) >> >> diff --git a/drivers/media/platform/exynos-gsc/gsc-core.c >> b/drivers/media/platform/exynos-gsc/gsc-core.c >> index 4380150..8f8636e 100644 >> --- a/drivers/media/platform/exynos-gsc/gsc-core.c >> +++ b/drivers/media/platform/exynos-gsc/gsc-core.c >> @@ -943,7 +943,37 @@ static irqreturn_t gsc_irq_handler(int irq, void >> *priv) >> return IRQ_HANDLED; >> } >> -static struct gsc_pix_max gsc_v_100_max = { >> +static struct gsc_pix_max gsc_v_5250_max = { >> + .org_scaler_bypass_w = 8192, >> + .org_scaler_bypass_h = 8192, >> + .org_scaler_input_w = 4800, >> + .org_scaler_input_h = 3344, >> + .real_rot_dis_w = 4800, >> + .real_rot_dis_h = 3344, >> + .real_rot_en_w = 2016, >> + .real_rot_en_h = 2016, >> + .target_rot_dis_w = 4800, >> + .target_rot_dis_h = 3344, >> + .target_rot_en_w = 2016, >> + .target_rot_en_h = 2016, >> +}; >> + >> +static struct gsc_pix_max gsc_v_5420_max = { >> + .org_scaler_bypass_w = 8192, >> + .org_scaler_bypass_h = 8192, >> + .org_scaler_input_w = 4800, >> + .org_scaler_input_h = 3344, >> + .real_rot_dis_w = 4800, >> + .real_rot_dis_h = 3344, >> + .real_rot_en_w = 2048, >> + .real_rot_en_h = 2048, >> + .target_rot_dis_w = 4800, >> + .target_rot_dis_h = 3344, >> + .target_rot_en_w = 2016, >> + .target_rot_en_h = 2016, >> +}; >> + >> +static struct gsc_pix_max gsc_v_5433_max = { >> .org_scaler_bypass_w = 8192, >> .org_scaler_bypass_h = 8192, >> .org_scaler_input_w = 4800, >> @@ -979,8 +1009,8 @@ static irqreturn_t gsc_irq_handler(int irq, void >> *priv) >> .target_h = 2, /* yuv420 : 2, others : 1 */ >> }; >> -static struct gsc_variant gsc_v_100_variant = { >> - .pix_max = &gsc_v_100_max, >> +static struct gsc_variant gsc_v_5250_variant = { >> + .pix_max = &gsc_v_5250_max, >> .pix_min = &gsc_v_100_min, >> .pix_align = &gsc_v_100_align, >> .in_buf_cnt = 32, >> @@ -992,12 +1022,48 @@ static irqreturn_t gsc_irq_handler(int irq, >> void *priv) >> .local_sc_down = 2, >> }; >> -static struct gsc_driverdata gsc_v_100_drvdata = { >> +static struct gsc_variant gsc_v_5420_variant = { >> + .pix_max = &gsc_v_5420_max, >> + .pix_min = &gsc_v_100_min, >> + .pix_align = &gsc_v_100_align, >> + .in_buf_cnt = 32, >> + .out_buf_cnt = 32, >> + .sc_up_max = 8, >> + .sc_down_max = 16, >> + .poly_sc_down_max = 4, >> + .pre_sc_down_max = 4, >> + .local_sc_down = 2, >> +}; >> + >> +static struct gsc_variant gsc_v_5433_variant = { >> + .pix_max = &gsc_v_5433_max, >> + .pix_min = &gsc_v_100_min, >> + .pix_align = &gsc_v_100_align, >> + .in_buf_cnt = 32, >> + .out_buf_cnt = 32, >> + .sc_up_max = 8, >> + .sc_down_max = 16, >> + .poly_sc_down_max = 4, >> + .pre_sc_down_max = 4, >> + .local_sc_down = 2, >> +}; >> + >> +static struct gsc_driverdata gsc_v_5250_drvdata = { >> .variant = { >> - [0] = &gsc_v_100_variant, >> - [1] = &gsc_v_100_variant, >> - [2] = &gsc_v_100_variant, >> - [3] = &gsc_v_100_variant, >> + [0] = &gsc_v_5250_variant, >> + [1] = &gsc_v_5250_variant, >> + [2] = &gsc_v_5250_variant, >> + [3] = &gsc_v_5250_variant, >> + }, >> + .num_entities = 4, >> + .clk_names = { "gscl" }, >> + .num_clocks = 1, >> +}; >> + >> +static struct gsc_driverdata gsc_v_5420_drvdata = { >> + .variant = { >> + [0] = &gsc_v_5420_variant, >> + [1] = &gsc_v_5420_variant, >> }, >> .num_entities = 4, >> .clk_names = { "gscl" }, >> @@ -1006,9 +1072,9 @@ static irqreturn_t gsc_irq_handler(int irq, >> void *priv) >> static struct gsc_driverdata gsc_5433_drvdata = { >> .variant = { >> - [0] = &gsc_v_100_variant, >> - [1] = &gsc_v_100_variant, >> - [2] = &gsc_v_100_variant, >> + [0] = &gsc_v_5433_variant, >> + [1] = &gsc_v_5433_variant, >> + [2] = &gsc_v_5433_variant, >> }, >> .num_entities = 3, >> .clk_names = { "pclk", "aclk", "aclk_xiu", "aclk_gsclbend" }, >> @@ -1017,8 +1083,12 @@ static irqreturn_t gsc_irq_handler(int irq, >> void *priv) >> static const struct of_device_id exynos_gsc_match[] = { >> { >> - .compatible = "samsung,exynos5-gsc", >> - .data = &gsc_v_100_drvdata, > > Can you keep the "samsung,exynos5-gsc" entry with the gsc_v_5250_variant > data, so that it can work with "samsung,exynos5-gsc" compatible in DT > on both exynos5250 and exynos5420 SoCs? > Thank you for your question. Exynos 5250 and 5420 have different hardware rotation limits. Exynos 5250 is '.real_rot_en_w/h = 2016' and 5420 is '.real_rot_en_w/h = 2048'. So my opinion they must have different compatible. Best regards, Hoegeun >> + .compatible = "samsung,exynos5250-gsc", >> + .data = &gsc_v_5250_drvdata, >> + }, >> + { >> + .compatible = "samsung,exynos5420-gsc", >> + .data = &gsc_v_5420_drvdata, >> }, >