Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751969AbdIMMJu (ORCPT ); Wed, 13 Sep 2017 08:09:50 -0400 Received: from esa5.microchip.iphmx.com ([216.71.150.166]:59734 "EHLO esa5.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751015AbdIMMJr (ORCPT ); Wed, 13 Sep 2017 08:09:47 -0400 X-IronPort-AV: E=Sophos;i="5.42,387,1500966000"; d="scan'208";a="4669448" Subject: Re: [PATCH v1 02/10] clk: at91: pmc: Save SCSR during suspend To: Romain Izard , Boris Brezillon , Michael Turquette , Stephen Boyd , Ludovic Desroches , Jonathan Cameron , Wenyou Yang , Josh Wu , David Woodhouse , Brian Norris , Marek Vasut , Cyrille Pitchen , Thierry Reding , Richard Genoud , Greg Kroah-Hartman , Alan Stern , Alexandre Belloni CC: , , , , , , , References: <20170908153604.28383-1-romain.izard.pro@gmail.com> <20170908153604.28383-3-romain.izard.pro@gmail.com> From: Nicolas Ferre Organization: microchip Message-ID: <318420d4-044f-d018-f70e-3ed4fcfb0fd0@microchip.com> Date: Wed, 13 Sep 2017 14:10:41 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <20170908153604.28383-3-romain.izard.pro@gmail.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1781 Lines: 51 On 08/09/2017 at 17:35, Romain Izard wrote: > The contents of the System Clock Status Register (SCSR) needs to be > restored into the System Clock Enable Register (SCER). > > As the bootloader will restore some clocks by itself, the issue can be > missed as only the USB controller, the LCD controller, the Image Sensor > controller and the programmable clocks will be impacted. > > Fix the obvious typo in the suspend/resume code, as the IMR register > does not need to be saved twice. > > Signed-off-by: Romain Izard Yes, it looks like a typo: Acked-by: Nicolas Ferre I didn't experienced the issue with LCD nor USB though. Regards, > --- > drivers/clk/at91/pmc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c > index 5c2b26de303e..07dc2861ad3f 100644 > --- a/drivers/clk/at91/pmc.c > +++ b/drivers/clk/at91/pmc.c > @@ -86,7 +86,7 @@ static int pmc_suspend(void) > { > int i; > > - regmap_read(pmcreg, AT91_PMC_IMR, &pmc_cache.scsr); > + regmap_read(pmcreg, AT91_PMC_SCSR, &pmc_cache.scsr); > regmap_read(pmcreg, AT91_PMC_PCSR, &pmc_cache.pcsr0); > regmap_read(pmcreg, AT91_CKGR_UCKR, &pmc_cache.uckr); > regmap_read(pmcreg, AT91_CKGR_MOR, &pmc_cache.mor); > @@ -129,7 +129,7 @@ static void pmc_resume(void) > if (pmc_cache.pllar != tmp) > pr_warn("PLLAR was not configured properly by the firmware\n"); > > - regmap_write(pmcreg, AT91_PMC_IMR, pmc_cache.scsr); > + regmap_write(pmcreg, AT91_PMC_SCER, pmc_cache.scsr); > regmap_write(pmcreg, AT91_PMC_PCER, pmc_cache.pcsr0); > regmap_write(pmcreg, AT91_CKGR_UCKR, pmc_cache.uckr); > regmap_write(pmcreg, AT91_CKGR_MOR, pmc_cache.mor); > -- Nicolas Ferre