Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751887AbdIOC0b (ORCPT ); Thu, 14 Sep 2017 22:26:31 -0400 Received: from regular1.263xmail.com ([211.150.99.134]:52441 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751722AbdIOC0H (ORCPT ); Thu, 14 Sep 2017 22:26:07 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: wxt@rock-chips.com X-FST-TO: wxt@rock-chips.com X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: wxt@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH 3/5] arm: dts: rockchip: add tsadc node for RV1108 SoC To: Rocky Hao Cc: rui.zhang@intel.com, edubezval@gmail.com, heiko@sntech.de, robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, huangtao@rock-chips.com, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, shawn.lin@rock-chips.com, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, cl@rock-chips.com, william.wu@rock-chips.com, jay.xu@rock-chips.com, xxx@rock-chips.com, linux-arm-kernel@lists.infradead.org, wxt@rock-chips.com References: <1503570475-7850-1-git-send-email-rocky.hao@rock-chips.com> <1503570475-7850-4-git-send-email-rocky.hao@rock-chips.com> From: Caesar Wang Message-ID: <89384e20-94d8-c698-135e-f48924c20493@rock-chips.com> Date: Fri, 15 Sep 2017 10:25:35 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <1503570475-7850-4-git-send-email-rocky.hao@rock-chips.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1946 Lines: 65 Rocky, 在 2017年08月24日 18:27, Rocky Hao 写道: > Add tsadc needed main information for RV1108 SoC. > 750000Hz is the max clock rate supported by tsadc module. > > Signed-off-by: Rocky Hao > --- > arch/arm/boot/dts/rv1108.dtsi | 29 +++++++++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi > index 25fab0b80f53..dbdd8c2180e7 100644 > --- a/arch/arm/boot/dts/rv1108.dtsi > +++ b/arch/arm/boot/dts/rv1108.dtsi > @@ -275,6 +275,25 @@ > status = "disabled"; > }; > > + tsadc: tsadc@10370000 { > + compatible = "rockchip,rv1108-tsadc"; > + reg = <0x10370000 0x100>; > + interrupts = ; > + assigned-clocks = <&cru SCLK_TSADC>; > + assigned-clock-rates = <750000>; > + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; > + clock-names = "tsadc", "apb_pclk"; > + pinctrl-names = "init", "default", "sleep"; > + pinctrl-0 = <&otp_gpio>; > + pinctrl-1 = <&otp_out>; > + pinctrl-2 = <&otp_gpio>; > + resets = <&cru SRST_TSADC>; > + reset-names = "tsadc-apb"; > + rockchip,hw-tshut-temp = <120000>; From the Patch[4/5], you set the critial temperature is 95 degree. I will suggest the Tshut temperature is 100 degree. Think about the the peripherial devices, the 120 degree will damage some chips. > + #thermal-sensor-cells = <1>; > + status = "disabled"; > + }; > + > adc: adc@1038c000 { > compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc"; > reg = <0x1038c000 0x100>; > @@ -642,6 +661,16 @@ > }; > }; > > + tsadc { > + otp_out: otp-out { > + rockchip,pins = <0 RK_PB7 RK_FUNC_1 &pcfg_pull_none>; > + }; > + > + otp_gpio: otp-gpio { > + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > uart0 { > uart0_xfer: uart0-xfer { > rockchip,pins = <3 RK_PA6 RK_FUNC_1 &pcfg_pull_up>,