Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751459AbdIOLPt (ORCPT ); Fri, 15 Sep 2017 07:15:49 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:36596 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751184AbdIOLPr (ORCPT ); Fri, 15 Sep 2017 07:15:47 -0400 X-Google-Smtp-Source: ADKCNb7TgsoSeLK7w9Ggi0f0g3rj+Rm7t/lOrLi/htif6p8AHoatzWsdRi8ElkzlgAwMl0+sJrlLhA== Subject: Re: [PATCH for 4.9 39/59] arm: dts: mt2701: Add subsystem clock controller device nodes To: "Levin, Alexander (Sasha Levin)" , "linux-kernel@vger.kernel.org" , "stable@vger.kernel.org" Cc: James Liao References: <20170914155051.8289-1-alexander.levin@verizon.com> <20170914155051.8289-39-alexander.levin@verizon.com> From: Matthias Brugger Message-ID: <4d69cf89-8896-8c86-b215-a34bdab1752d@gmail.com> Date: Fri, 15 Sep 2017 13:15:43 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <20170914155051.8289-39-alexander.levin@verizon.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1921 Lines: 70 On 09/14/2017 05:51 PM, Levin, Alexander (Sasha Levin) wrote: > From: James Liao > > [ Upstream commit f235c7e7a75325f28a33559a71f25a0eca6112db ] > > Add MT2701 subsystem clock controllers, inlcude mmsys, imgsys, > vdecsys, hifsys, ethsys and bdpsys. > > Signed-off-by: James Liao > Signed-off-by: Matthias Brugger > Signed-off-by: Sasha Levin > --- > arch/arm/boot/dts/mt2701.dtsi | 36 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) > It's not clear to me which bug in v4.9.y you are fixing with this. Can you please explain. Thanks, Matthias > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi > index 18596a2c58a1..77c6b931dc24 100644 > --- a/arch/arm/boot/dts/mt2701.dtsi > +++ b/arch/arm/boot/dts/mt2701.dtsi > @@ -174,4 +174,40 @@ > clocks = <&uart_clk>; > status = "disabled"; > }; > + > + mmsys: syscon@14000000 { > + compatible = "mediatek,mt2701-mmsys", "syscon"; > + reg = <0 0x14000000 0 0x1000>; > + #clock-cells = <1>; > + }; > + > + imgsys: syscon@15000000 { > + compatible = "mediatek,mt2701-imgsys", "syscon"; > + reg = <0 0x15000000 0 0x1000>; > + #clock-cells = <1>; > + }; > + > + vdecsys: syscon@16000000 { > + compatible = "mediatek,mt2701-vdecsys", "syscon"; > + reg = <0 0x16000000 0 0x1000>; > + #clock-cells = <1>; > + }; > + > + hifsys: syscon@1a000000 { > + compatible = "mediatek,mt2701-hifsys", "syscon"; > + reg = <0 0x1a000000 0 0x1000>; > + #clock-cells = <1>; > + }; > + > + ethsys: syscon@1b000000 { > + compatible = "mediatek,mt2701-ethsys", "syscon"; > + reg = <0 0x1b000000 0 0x1000>; > + #clock-cells = <1>; > + }; > + > + bdpsys: syscon@1c000000 { > + compatible = "mediatek,mt2701-bdpsys", "syscon"; > + reg = <0 0x1c000000 0 0x1000>; > + #clock-cells = <1>; > + }; > }; >