Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755411AbdIRLcH (ORCPT ); Mon, 18 Sep 2017 07:32:07 -0400 Received: from gloria.sntech.de ([95.129.55.99]:50500 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753475AbdIRLcG (ORCPT ); Mon, 18 Sep 2017 07:32:06 -0400 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Nickey Yang Cc: mark.yao@rock-chips.com, robh+dt@kernel.org, mark.rutland@arm.com, airlied@linux.ie, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, seanpaul@chromium.org, briannorris@chromium.org, hl@rock-chips.com, zyw@rock-chips.com, bivvy.bi@rock-chips.com, xbl@rock-chips.com Subject: Re: [PATCH 5/7] arm64: dts: rockchip: rk3399: Correct MIPI DPHY PLL clock Date: Mon, 18 Sep 2017 13:31:59 +0200 Message-ID: <1555719.xlEhX7V6v3@diego> User-Agent: KMail/5.2.3 (Linux/4.11.0-1-amd64; KDE/5.28.0; x86_64; ; ) In-Reply-To: <1505725539-6309-5-git-send-email-nickey.yang@rock-chips.com> References: <1505725539-6309-1-git-send-email-nickey.yang@rock-chips.com> <1505725539-6309-5-git-send-email-nickey.yang@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1166 Lines: 32 Hi Nickey, Am Montag, 18. September 2017, 17:05:37 CEST schrieb Nickey Yang: > clk_24m --> Gate11[14] --> clk_mipidphy_ref --> Gate21[0] --> clk_dphy_pll please try to be a bit more verbose in your commit messages :-) . It looks to me, like this patch does not depend on the other ones and I can just pick it directly. Correct? Heiko > Signed-off-by: Nickey Yang > --- > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index d79e9b3..6aa43fd 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > @@ -1629,7 +1629,7 @@ > compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"; > reg = <0x0 0xff960000 0x0 0x8000>; > interrupts = ; > - clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>, > + clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI0>, > <&cru SCLK_DPHY_TX0_CFG>; > clock-names = "ref", "pclk", "phy_cfg"; > power-domains = <&power RK3399_PD_VIO>;