Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932501AbdIRNiz convert rfc822-to-8bit (ORCPT ); Mon, 18 Sep 2017 09:38:55 -0400 Received: from mail-out-1.itc.rwth-aachen.de ([134.130.5.46]:37958 "EHLO mail-out-1.itc.rwth-aachen.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754807AbdIRNix (ORCPT ); Mon, 18 Sep 2017 09:38:53 -0400 X-IronPort-AV: E=Sophos;i="5.42,413,1500933600"; d="scan'208";a="13904858" From: =?iso-8859-1?Q?Br=FCns=2C_Stefan?= To: Maxime Ripard CC: "linux-sunxi@googlegroups.com" , "devicetree@vger.kernel.org" , "dmaengine@vger.kernel.org" , Vinod Koul , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Chen-Yu Tsai , Rob Herring , Code Kipper , Andre Przywara Subject: Re: [PATCH v2 06/10] arm64: allwinner: a64: Add devicetree binding for DMA controller Thread-Topic: [PATCH v2 06/10] arm64: allwinner: a64: Add devicetree binding for DMA controller Thread-Index: AQHTMFah16CQC7zw5EGQNSbmYFTjQqK6hLcA Date: Mon, 18 Sep 2017 13:38:50 +0000 Message-ID: <13822703.glkPkggzn6@sbruens-linux> References: <20170917031956.28010-1-stefan.bruens@rwth-aachen.de> <20170917031956.28010-7-stefan.bruens@rwth-aachen.de> <20170918081134.obpoaiwd7dgzdcak@flea.lan> In-Reply-To: <20170918081134.obpoaiwd7dgzdcak@flea.lan> Accept-Language: en-US, de-DE Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [78.35.13.203] Content-Type: text/plain; charset="iso-8859-1" Content-ID: <29E16918749D36448517A33892830162@rwth-ad.de> Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1859 Lines: 50 On Montag, 18. September 2017 10:11:34 CEST Maxime Ripard wrote: > On Sun, Sep 17, 2017 at 05:19:52AM +0200, Stefan Br?ns wrote: > > The A64 is register compatible with the H3, but has a different number > > of dma channels and request ports. > > > > Attach additional properties to the node to allow future reuse of the > > compatible for controllers with different number of channels/requests. > > > > If dma-requests is not specified, the register layout defined maximum > > of 32 is used. > > > > Signed-off-by: Stefan Br?ns > > --- > > > > .../devicetree/bindings/dma/sun6i-dma.txt | 26 > > ++++++++++++++++++++++ 1 file changed, 26 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt > > b/Documentation/devicetree/bindings/dma/sun6i-dma.txt index > > 98fbe1a5c6dd..6ebc79f95202 100644 > > --- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt > > +++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt > > > > @@ -27,6 +27,32 @@ Example: > > #dma-cells = <1>; > > > > }; > > > > +------------------------------------------------------------------------- > > ----- +For A64 DMA controller: > > + > > +Required properties: > > +- compatible: "allwinner,sun50i-a64-dma" > > +- dma-channels: Number of DMA channels supported by the controller. > > + Refer to Documentation/devicetree/bindings/dma/dma.txt > > +- all properties above, i.e. reg, interrupts, clocks, resets and > > #dma-cells + > > +Optional properties: > > +- dma-requests: Number of DMA request signals supported by the > > controller. > > + Refer to Documentation/devicetree/bindings/dma/dma.txt > > You're error'ing out if dma-requests, so it isn't optional. I guess we > should just make it mandatory. No, it defaults to DMA_CHAN_MAX_DRQ = 31, see patch 07/10. Kind regards, Stefan