Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751476AbdISIu5 (ORCPT ); Tue, 19 Sep 2017 04:50:57 -0400 Received: from mhqcas02.moxa.com ([59.124.42.181]:19488 "EHLO mhqmail.moxa.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751034AbdISIuz (ORCPT ); Tue, 19 Sep 2017 04:50:55 -0400 X-Greylist: delayed 327 seconds by postgrey-1.27 at vger.kernel.org; Tue, 19 Sep 2017 04:50:55 EDT From: =?big5?B?U1ogTGluICiqTKRXtLwp?= To: =?big5?B?U1ogTGluICiqTKRXtLwp?= CC: "Minghuan.Lian@nxp.com" , "Zhiqiang.Hou@nxp.com" , "andy.tang@nxp.com" , "yi.sheng.lin@nxp.com" , Rob Herring , Mark Rutland , Russell King , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: RE: [RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC Thread-Topic: [RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC Thread-Index: AQHTK5OOp95SqdlAfE+Oy7TofnVuGqK77k2Q Date: Tue, 19 Sep 2017 08:45:25 +0000 Message-ID: <5942081F7727964D830FC876E62CA856FEBDAF73@MHQMBX01.moxa.com> References: <20170912064925.24571-1-sz.lin@moxa.com> In-Reply-To: <20170912064925.24571-1-sz.lin@moxa.com> Accept-Language: en-US, zh-TW Content-Language: zh-TW X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.144.4.141] Content-Type: text/plain; charset="big5" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id v8J8p3Wq004633 Content-Length: 329 Lines: 12 > Add QSPI node support, and this function is disabled by default This setting could be overwritten > in board-level definitions > > Signed-off-by: SZ Lin > --- This is a resend patch [1]. Any feedback would be greatly appreciated! ref: [1]: https://patchwork.kernel.org/patch/9889431/ Best regards, SZ Lin