Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751915AbdITMqW (ORCPT ); Wed, 20 Sep 2017 08:46:22 -0400 Received: from mail.kapsi.fi ([91.232.154.25]:35595 "EHLO mail.kapsi.fi" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751680AbdITMqU (ORCPT ); Wed, 20 Sep 2017 08:46:20 -0400 Subject: Re: [PATCH] arm64: tegra: Add SMMU node for Tegra186 To: Krishna Reddy , robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, thierry.reding@gmail.com, jonathanh@nvidia.com, josephl@nvidia.com, acourbot@nvidia.com, mperttunen@nvidia.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org References: <1505343714-22359-1-git-send-email-vdumpa@nvidia.com> From: Mikko Perttunen Message-ID: <16a3d9cb-eb74-7e1c-82e2-487d0ed9db8f@kapsi.fi> Date: Wed, 20 Sep 2017 15:46:14 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <1505343714-22359-1-git-send-email-vdumpa@nvidia.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 62.209.167.43 X-SA-Exim-Mail-From: cyndis@kapsi.fi X-SA-Exim-Scanned: No (on mail.kapsi.fi); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4217 Lines: 105 Reviewed-by: Mikko Perttunen Tested-by: Mikko Perttunen Tested to work with Host1x :) I noticed a slight difference with downstream where downstream has global interrupts 170 and 171 - but looks like the latter is for secure faults which we should never get so this way seems more correct. Thanks, Mikko On 14.09.2017 02:01, Krishna Reddy wrote: > Add the DT node for ARM SMMU on Tegra186. > > Signed-off-by: Krishna Reddy > --- > arch/arm64/boot/dts/nvidia/tegra186.dtsi | 73 ++++++++++++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi > index 0b0552c9f7dd..e2c3ad203c93 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi > @@ -355,6 +355,79 @@ > nvidia,bpmp = <&bpmp>; > }; > > + smmu: iommu@12000000 { > + compatible = "arm,mmu-500"; > + reg = <0 0x12000000 0 0x800000>; > + #global-interrupts = <1>; > + interrupts = , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > + #iommu-cells = <1>; > + stream-match-mask = <0x7F80>; > + }; > + > gpu@17000000 { > compatible = "nvidia,gp10b"; > reg = <0x0 0x17000000 0x0 0x1000000>, >