Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751931AbdIUXgN (ORCPT ); Thu, 21 Sep 2017 19:36:13 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:36948 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751728AbdIUXgL (ORCPT ); Thu, 21 Sep 2017 19:36:11 -0400 X-Google-Smtp-Source: AOwi7QDjNW262NZAmfNw8tpnOtxLv/awVyg/VSwuIA5fDTSInLxM6+A9FyCZch7cWwaN/7Poe8ZKYQ== Date: Thu, 21 Sep 2017 18:36:09 -0500 From: Rob Herring To: Tirupathi Reddy Cc: sboyd@codeaurora.org, mturquette@baylibre.com, mark.rutland@arm.com, andy.gross@linaro.org, david.brown@linaro.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Subject: Re: [PATCH V5] clk: qcom: Add spmi_pmic clock divider support Message-ID: <20170921233609.t65nskglysn4v4qp@rob-hp-laptop> References: <1505817286-12445-1-git-send-email-tirupath@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1505817286-12445-1-git-send-email-tirupath@codeaurora.org> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 805 Lines: 17 On Tue, Sep 19, 2017 at 04:04:46PM +0530, Tirupathi Reddy wrote: > Clkdiv module provides a clock output on the PMIC with CXO as > the source. This clock can be routed through PMIC GPIOs. Add > a device driver to configure this clkdiv module. > > Signed-off-by: Tirupathi Reddy > --- > .../bindings/clock/clk-spmi-pmic-div.txt | 56 ++++ Acked-by: Rob Herring > drivers/clk/qcom/Kconfig | 9 + > drivers/clk/qcom/Makefile | 1 + > drivers/clk/qcom/clk-spmi-pmic-div.c | 343 +++++++++++++++++++++ > 4 files changed, 409 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt > create mode 100644 drivers/clk/qcom/clk-spmi-pmic-div.c