Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752413AbdIXML6 (ORCPT ); Sun, 24 Sep 2017 08:11:58 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:34874 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752367AbdIXML4 (ORCPT ); Sun, 24 Sep 2017 08:11:56 -0400 X-Google-Smtp-Source: AOwi7QDiZ7fJE8gGZLIOq0q5GJDZIqnb8l5PFKuA+why498HSAGbk3TRmfgu5wvXZisFLlFZ1WMK4g== Subject: Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support To: Vignesh R , Cyrille Pitchen Cc: David Woodhouse , Brian Norris , Boris Brezillon , Rob Herring , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel References: <20170924105924.23923-1-vigneshr@ti.com> <20170924105924.23923-6-vigneshr@ti.com> From: Marek Vasut Message-ID: <3a1160f9-a0ae-c84c-d209-af97c3c3b0f6@gmail.com> Date: Sun, 24 Sep 2017 14:01:03 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <20170924105924.23923-6-vigneshr@ti.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1491 Lines: 54 On 09/24/2017 12:59 PM, Vignesh R wrote: > Add pm_runtime* calls to cadence-quadspi driver. This is required to > switch on QSPI power domain on TI 66AK2G SoC during probe. > > Signed-off-by: Vignesh R Are you planning to add some more fine-grained PM control later? > --- > drivers/mtd/spi-nor/cadence-quadspi.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c > index d9629e8f4798..2c8e6226d267 100644 > --- a/drivers/mtd/spi-nor/cadence-quadspi.c > +++ b/drivers/mtd/spi-nor/cadence-quadspi.c > @@ -31,6 +31,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -1224,6 +1225,13 @@ static int cqspi_probe(struct platform_device *pdev) > return -ENXIO; > } > > + pm_runtime_enable(&pdev->dev); > + ret = pm_runtime_get_sync(&pdev->dev); > + if (ret < 0) { > + pm_runtime_put_noidle(&pdev->dev); > + return ret; > + } > + > ret = clk_prepare_enable(cqspi->clk); > if (ret) { > dev_err(dev, "Cannot enable QSPI clock.\n"); > @@ -1275,6 +1283,9 @@ static int cqspi_remove(struct platform_device *pdev) > > clk_disable_unprepare(cqspi->clk); > > + pm_runtime_put_sync(&pdev->dev); > + pm_runtime_disable(&pdev->dev); > + > return 0; > } > > -- Best regards, Marek Vasut