Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966316AbdIYXYq (ORCPT ); Mon, 25 Sep 2017 19:24:46 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:37538 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966230AbdIYXYc (ORCPT ); Mon, 25 Sep 2017 19:24:32 -0400 X-Google-Smtp-Source: AOwi7QC7TbLlFRzjeAjj1BElMCI0Cd/rSOGQp/BGcBhs81qLH/t6U//zxEj5SPhu8r2+NQre38HZdg== From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Laxman Dewangan , Peter De Schrijver , Prashant Gaikwad , Michael Turquette , Stephen Boyd , Rob Herring , Vinod Koul Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 5/5] ARM: dts: tegra: Add AHB DMA controller nodes Date: Tue, 26 Sep 2017 02:22:06 +0300 Message-Id: X-Mailer: git-send-email 2.14.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1460 Lines: 50 Add AHB DMA controller nodes to Tegra20/30 DT's. Signed-off-by: Dmitry Osipenko --- arch/arm/boot/dts/tegra20.dtsi | 9 +++++++++ arch/arm/boot/dts/tegra30.dtsi | 9 +++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index f1579c9a7ef4..d0c0c26427f7 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -200,6 +200,15 @@ reg = <0x60007000 0x1000>; }; + ahbdma: ahbdma@60008000 { + compatible = "nvidia,tegra20-ahbdma"; + reg = <0x60008000 0x2000>; + interrupts = ; + clocks = <&tegra_car TEGRA20_CLK_AHBDMA>; + resets = <&tegra_car 33>; + #dma-cells = <1>; + }; + apbdma: dma@6000a000 { compatible = "nvidia,tegra20-apbdma"; reg = <0x6000a000 0x1200>; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 13960fda7471..0800d9a8c546 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -291,6 +291,15 @@ reg = <0x60007000 0x1000>; }; + ahbdma: ahbdma@60008000 { + compatible = "nvidia,tegra20-ahbdma"; + reg = <0x60008000 0x2000>; + interrupts = ; + clocks = <&tegra_car TEGRA30_CLK_AHBDMA>; + resets = <&tegra_car 33>; + #dma-cells = <1>; + }; + apbdma: dma@6000a000 { compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma"; reg = <0x6000a000 0x1400>; -- 2.14.1